Inventor · disambiguated record
Giri N. K. Rangan
Also filed as: RANGAN GIRI · RANGAN GIRI N · RANGAN GIRI N K
10 granted patents·1 pending application·54 citations·filing 2007–2016
87Inventor score
Top patents by PatentIndex Score
11 records- 0189US9698968B2Phase interpolator calibrationIBM·Filed 2016·Granted Jul 4, 2017·8 cites·22 claims
- 0287US8872587B2Generating negative impedance compensationIBM·Filed 2013·Granted Oct 28, 2014·15 cites·9 claims
- 0378US9595943B2Implementing broadband resonator for resonant clock distributionGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 14, 2017·6 cites·8 claims
- 0477US9306729B2Phase interpolator calibrationIBM·Filed 2014·Granted Apr 5, 2016·4 cites·23 claims
- 0566US7671776B1Input sampling network that avoids undesired transient voltagesINTERSIL INC·Filed 2008·Granted Mar 2, 2010·6 cites·22 claims
- 0658US8271567B2Methods and systems for compression, storage, and generation of digital filter coefficientsNENE SANTOSH·Filed 2008·Granted Sep 18, 2012·5 cites·10 claims
- 0757US7737795B2Voltage controlled oscillatorRANGAN GIRI N K·Filed 2007·Granted Jun 15, 2010·4 cites·12 claims
- 0856US9893718B1Transmission driver impedance calibration circuitGLOBALFOUNDRIES INC·Filed 2016·Granted Feb 13, 2018·1 cites·20 claims
- 0954US8093985B1Architecture for a highly accurate DCPKUMATH LOKESH·Filed 2008·Granted Jan 10, 2012·5 cites·19 claims
- 1039US9542354B2Generating a parallel data signal by converting serial data of a serial data signal to parallel dataGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 10, 2017·0 cites·18 claims
- 1130US2017046470A1Process design kit for efficient and accurate mismatch simulation of analog circuitsGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →