Inventor · disambiguated record
Glenn A. Glass
Also filed as: GLASS GLENN · GLASS GLENN A
174 granted patents·45 pending applications·1,255 citations·filing 1998–2025
99Inventor score
Top patents by PatentIndex Score
219 records- 0199US11251281B2Contact resistance reduction employing germanium overlayer pre-contact metalizationINTEL CORP·Filed 2020·Granted Feb 15, 2022·5 cites·20 claims
- 0298US9583491B2CMOS nanowire structureKIM SEIYON·Filed 2015·Granted Feb 28, 2017·28 cites·15 claims
- 0398US9349810B2Selective germanium P-contact metalization through trenchINTEL CORP·Filed 2015·Granted May 24, 2016·17 cites·20 claims
- 0498US9343559B2Nanowire transistor devices and forming techniquesINTEL CORP·Filed 2015·Granted May 17, 2016·25 cites·20 claims
- 0598US9224810B2CMOS nanowire structureKIM SEIYON·Filed 2011·Granted Dec 29, 2015·44 cites·23 claims
- 0698US9117791B2Selective germanium P-contact metalization through trenchGLASS GLENN A·Filed 2011·Granted Aug 25, 2015·38 cites·22 claims
- 0798US8847281B2High mobility strained channels for fin-based transistorsCEA STEPHEN M·Filed 2012·Granted Sep 30, 2014·47 cites·22 claims
- 0898US7402872B2Method for forming an integrated circuitINTEL CORP·Filed 2006·Granted Jul 22, 2008·141 cites·15 claims
- 0997US9728464B2Self-aligned 3-D epitaxial structures for MOS device fabricationGLASS GLENN A·Filed 2012·Granted Aug 8, 2017·28 cites·30 claims
- 1097US9484432B2Contact resistance reduction employing germanium overlayer pre-contact metalizationINTEL CORP·Filed 2015·Granted Nov 1, 2016·14 cites·20 claims
- 1197US9437691B2Column IV transistors for PMOS integrationGLASS GLENN A·Filed 2011·Granted Sep 6, 2016·18 cites·25 claims
- 1297US9153583B2III-V layers for N-type and P-type MOS source-drain contactsGLASS GLENN A·Filed 2011·Granted Oct 6, 2015·28 cites·25 claims
- 1397US9012284B2Nanowire transistor devices and forming techniquesGLASS GLENN A·Filed 2012·Granted Apr 21, 2015·37 cites·28 claims
- 1497US8994104B2Contact resistance reduction employing germanium overlayer pre-contact metalizationGLASS GLENN A·Filed 2011·Granted Mar 31, 2015·41 cites·23 claims
- 1597US8901537B2Transistors with high concentration of boron doped germaniumMURTHY ANAND S·Filed 2010·Granted Dec 2, 2014·56 cites·25 claims
- 1697US7195985B2CMOS transistor junction regions formed by a CVD etching and deposition sequenceINTEL CORP·Filed 2005·Granted Mar 27, 2007·98 cites·14 claims
- 1797US6949482B2Method for improving transistor performance through reducing the salicide interface resistanceINTEL CORP·Filed 2003·Granted Sep 27, 2005·100 cites·31 claims
- 1896US9812524B2Nanowire transistor devices and forming techniquesINTEL CORP·Filed 2016·Granted Nov 7, 2017·13 cites·20 claims
- 1996US9722023B2Selective germanium P-contact metalization through trenchINTEL CORP·Filed 2016·Granted Aug 1, 2017·9 cites·20 claims
- 2096US9627384B2Transistors with high concentration of boron doped germaniumINTEL CORP·Filed 2014·Granted Apr 18, 2017·12 cites·20 claims
- 2196US9472613B2Conversion of strain-inducing buffer to electrical insulatorINTEL CORP·Filed 2015·Granted Oct 18, 2016·13 cites·20 claims
- 2296US9059024B2Self-aligned contact metallization for reduced contact resistanceGLASS GLENN A·Filed 2011·Granted Jun 16, 2015·25 cites·25 claims
- 2395US10734412B2Backside contact resistance reduction for semiconductor devices with metallization on both sidesINTEL CORP·Filed 2016·Granted Aug 4, 2020·15 cites·20 claims
- 2495US10700178B2Contact resistance reduction employing germanium overlayer pre-contact metalizationINTEL CORP·Filed 2019·Granted Jun 30, 2020·7 cites·20 claims
- 2595US9397102B2III-V layers for N-type and P-type MOS source-drain contactsINTEL CORP·Filed 2015·Granted Jul 19, 2016·11 cites·21 claims
- 2695US7479432B2CMOS transistor junction regions formed by a CVD etching and deposition sequenceINTEL CORP·Filed 2006·Granted Jan 20, 2009·31 cites·9 claims
- 2795US7274055B2Method for improving transistor performance through reducing the salicide interface resistanceINTEL CORP·Filed 2005·Granted Sep 25, 2007·26 cites·15 claims
- 2894US9224735B2Self-aligned contact metallization for reduced contact resistanceINTEL CORP·Filed 2015·Granted Dec 29, 2015·9 cites·20 claims
- 2994US8896066B2Tin doped III-V material contactsINTEL CORP·Filed 2012·Granted Nov 25, 2014·14 cites·25 claims
- 3093US11450738B2Source/drain regions in integrated circuit structuresINTEL CORP·Filed 2020·Granted Sep 20, 2022·3 cites·20 claims
- 3193US11387320B2Transistors with high concentration of germaniumINTEL CORP·Filed 2019·Granted Jul 12, 2022·3 cites·20 claims
- 3293US11222977B2Source/drain diffusion barrier for germanium NMOS transistorsINTEL CORP·Filed 2017·Granted Jan 11, 2022·8 cites·22 claims
- 3393US10074573B2CMOS nanowire structureINTEL CORP·Filed 2017·Granted Sep 11, 2018·8 cites·18 claims
- 3493US9859424B2Techniques for integration of Ge-rich p-MOS source/drain contactsINTEL CORP·Filed 2014·Granted Jan 2, 2018·12 cites·25 claims
- 3593US9754940B2Self-aligned contact metallization for reduced contact resistanceINTEL CORP·Filed 2015·Granted Sep 5, 2017·7 cites·20 claims
- 3693US9184294B2High mobility strained channels for fin-based transistorsINTEL CORP·Filed 2014·Granted Nov 10, 2015·11 cites·17 claims
- 3793US9129827B2Conversion of strain-inducing buffer to electrical insulatorCAPPELLANI ANNALISA·Filed 2012·Granted Sep 8, 2015·12 cites·25 claims
- 3893US8957476B2Conversion of thin transistor elements from silicon to silicon germaniumGLASS GLENN A·Filed 2012·Granted Feb 17, 2015·16 cites·16 claims
- 3993US7678631B2Formation of strain-inducing filmsINTEL CORP·Filed 2006·Granted Mar 16, 2010·22 cites·6 claims
- 4092US11610995B2Methods of forming dislocation enhanced strain in NMOS and PMOS structuresDAEDALUS PRIME LLC·Filed 2022·Granted Mar 21, 2023·1 cites·10 claims
- 4192US11527612B2Gate-all-around integrated circuit structures having vertically discrete source or drain structuresINTEL CORP·Filed 2018·Granted Dec 13, 2022·6 cites·13 claims
- 4292US10211208B2High-mobility semiconductor source/drain spacerINTEL CORP·Filed 2015·Granted Feb 19, 2019·7 cites·21 claims
- 4391US10229997B2Indium-rich NMOS transistor channelsINTEL CORP·Filed 2015·Granted Mar 12, 2019·6 cites·20 claims
- 4491US9691843B2Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or compositionINTEL CORP·Filed 2016·Granted Jun 27, 2017·7 cites·11 claims
- 4590US10141311B2Techniques for achieving multiple transistor fin dimensions on a single dieINTEL CORP·Filed 2014·Granted Nov 27, 2018·6 cites·24 claims
- 4689US11581406B2Method of fabricating CMOS FinFETs by selectively etching a strained SiGe layerINTEL CORP·Filed 2021·Granted Feb 14, 2023·1 cites·17 claims
- 4789US10153372B2High mobility strained channels for fin-based NMOS transistorsINTEL CORP·Filed 2014·Granted Dec 11, 2018·5 cites·25 claims
- 4889US9653584B2Pre-sculpting of Si fin elements prior to cladding for transistor channel applicationsINTEL CORP·Filed 2013·Granted May 16, 2017·7 cites·14 claims
- 4989US7358547B2Selective deposition to improve selectivity and structures formed therebyINTEL CORP·Filed 2005·Granted Apr 15, 2008·17 cites·4 claims
- 5088US10535735B2Contact resistance reduced P-MOS transistors employing Ge-rich contact layerGLASS GLENN A·Filed 2012·Granted Jan 14, 2020·7 cites·24 claims
Showing the top 50 of 219 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when Glenn A. Glass files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →