Inventor · disambiguated record
Gregory D. Sabin
Also filed as: SABIN GREGORY D
10 granted patents·214 citations·filing 1994–2006
91Inventor score
Files withINTEL CORP10
Top patents by PatentIndex Score
10 records- 0190US5538141ATest flow assurance using memory imprintingINTEL CORP·Filed 1994·Granted Jul 23, 1996·57 cites·8 claims
- 0288US5603412AApparatus and semiconductor component for assuring test flow complianceINTEL CORP·Filed 1996·Granted Feb 18, 1997·56 cites·9 claims
- 0366US6734093B1Method for placing active circuits beneath active bonding padsINTEL CORP·Filed 1999·Granted May 11, 2004·29 cites·31 claims
- 0460US5895443ATestable non-volatile memory deviceINTEL CORP·Filed 1996·Granted Apr 20, 1999·16 cites·7 claims
- 0559US5703496AMethod and apparatus for limiting the slew rate of output drivers by selectively programming the threshold voltage of flash cells connected theretoINTEL CORP·Filed 1996·Granted Dec 30, 1997·16 cites·17 claims
- 0657US6737745B2Method for relieving bond stress in an under-bond-pad resistorINTEL CORP·Filed 2002·Granted May 18, 2004·7 cites·9 claims
- 0753US6486051B1Method for relieving bond stress in an under-bond-pad resistorINTEL CORP·Filed 1999·Granted Nov 26, 2002·17 cites·31 claims
- 0847USRE41355EMethod for placing active circuits beneath active bonding padsINTEL CORP·Filed 2006·Granted May 25, 2010·0 cites·61 claims
- 0946US5638007AMethod and apparatus for limiting the slew rate of output drivers of an integrated circuit by using programmable flash cellsINTEL CORP·Filed 1995·Granted Jun 10, 1997·9 cites·14 claims
- 1039US5900770AVariable loading apparatus for output loading of integrated circuitsINTEL CORP·Filed 1997·Granted May 4, 1999·7 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →