Inventor · disambiguated record
Gregorio Spadea
Also filed as: SPADEA GREGORIO
10 granted patents·4 pending applications·227 citations·filing 1975–2008
90Inventor score
Files withNAT SEMICONDUCTOR CORP4SPADEA GREGORIO3VIRTUAL SILICON TECHNOLOGY INC3BERGEMONT ALBERT1FUJITSU LTD1
Top patents by PatentIndex Score
14 records- 0185US3983620ASelf-aligned CMOS process for bulk silicon and insulating substrate deviceNAT SEMICONDUCTOR CORP·Filed 1975·Granted Oct 5, 1976·52 cites·1 claims
- 0284US7075140B2Low voltage EEPROM memory arraysSPADEA GREGORIO·Filed 2004·Granted Jul 11, 2006·49 cites·21 claims
- 0384US4224733AIon implantation methodFUJITSU LTD·Filed 1977·Granted Sep 30, 1980·46 cites·15 claims
- 0482US6451652B1Method for forming an EEPROM cell together with transistor for peripheral circuitsJOHN MILLARD AND PAMELA ANN CA·Filed 2000·Granted Sep 17, 2002·34 cites·11 claims
- 0572US6606265B2Common source EEPROM and flash memoryVIRTUAL SILICON TECHNOLOGY INC·Filed 2001·Granted Aug 12, 2003·18 cites·3 claims
- 0660US7332769B2Non-volatile memory arrangement having nanocrystalsSPADEA GREGORIO·Filed 2005·Granted Feb 19, 2008·2 cites·15 claims
- 0752US4047284ASelf-aligned CMOS process for bulk silicon and insulating substrate deviceNAT SEMICONDUCTOR CORP·Filed 1976·Granted Sep 13, 1977·14 cites·2 claims
- 0846US2006284266A1High voltage N-channel LDMOS devices built in a deep submicron CMOS processVIRTUAL SILICON TECHNOLOGY INC·Filed 2006·Application pending·0 cites
- 0945US2008128794A1Non-Volatile Memory Including Insulated Gate Bipolar Transistors And Charge Trapping Layer Containing Silicon and NitrogenSPADEA GREGORIO·Filed 2008·Application pending·0 cites
- 1044USRE40976ECommon source EEPROM and flash memoryBERGEMONT ALBERT·Filed 2005·Granted Nov 17, 2009·1 cites·35 claims
- 1141US2006284265A1High voltage N-channel LDMOS devices built in a deep submicron CMOS processSTELLAR KINETICS LLC·Filed 2006·Application pending·0 cites
- 1239US4043025ASelf-aligned CMOS process for bulk silicon and insulating substrate deviceNAT SEMICONDUCTOR CORP·Filed 1976·Granted Aug 23, 1977·8 cites·3 claims
- 1336US2002171103A1High voltage N-channel LDMOS devices built in a deep submicron CMOS processVIRTUAL SILICON TECHNOLOGY INC·Filed 2002·Application pending·0 cites
- 1431US4047285ASelf-aligned CMOS for bulk silicon and insulating substrate deviceNAT SEMICONDUCTOR CORP·Filed 1976·Granted Sep 13, 1977·3 cites·1 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →