Inventor · disambiguated record
Guido Jozef Maria Dormans
Also filed as: DORMANS GUIDO · DORMANS GUIDO J M · DORMANS GUIDO JOZEF MARIA
14 granted patents·6 pending applications·413 citations·filing 1997–2021
93Inventor score
Files withKONINKL PHILIPS ELECTRONICS NV4NXP BV4PHILIPS CORP4BOTER JOHAN DICK1HENDRICKS ANTONIUS MARIA PETRUS JOHANNES1
Top patents by PatentIndex Score
20 records- 0195US6326661B1Semiconductor devicePHILIPS CORP·Filed 2000·Granted Dec 4, 2001·133 cites·8 claims
- 0290US6174759B1Method of manufacturing a semiconductor devicePHILIPS CORP·Filed 1999·Granted Jan 16, 2001·83 cites·10 claims
- 0387US5879990ASemiconductor device having an embedded non-volatile memory and method of manufacturing such a semicondutor devicePHILIPS CORP·Filed 1997·Granted Mar 9, 1999·78 cites·4 claims
- 0486US7006381B2Semiconductor device having a byte-erasable EEPROM memoryKONINKL PHILIPS ELECTRONICS NV·Filed 2002·Granted Feb 28, 2006·46 cites·9 claims
- 0580US6815755B2Non-volatile memory cells, high voltage transistors and logic transistors integrated on a single chipKONINKL PHILIPS ELECTRONICS NV·Filed 2003·Granted Nov 9, 2004·23 cites·7 claims
- 0666US8063429B2Conductive spacers extended floating gatesHENDRIKS ANTONIUS MARIA PETRUS JOHANNES·Filed 2008·Granted Nov 22, 2011·4 cites·7 claims
- 0764US6518619B2Virtual-ground, split-gate flash memory cell arrangements and method for producing sameKONINKL PHILIPS ELECTRONICS NV·Filed 2000·Granted Feb 11, 2003·20 cites·5 claims
- 0861US8349708B2Integrated circuits on a wafer and methods for manufacturing integrated circuitsNXP BV·Filed 2008·Granted Jan 8, 2013·1 cites·12 claims
- 0954US8576603B2Flash- and ROM-memoryVERHAAR ROB·Filed 2005·Granted Nov 5, 2013·3 cites·19 claims
- 1054US7416939B2Conductive spacers extended floating gatesNXP BV·Filed 2003·Granted Aug 26, 2008·6 cites·13 claims
- 1153US8278202B2Conductive spacers extended floating gatesHENDRICKS ANTONIUS MARIA PETRUS JOHANNES·Filed 2008·Granted Oct 2, 2012·2 cites·18 claims
- 1249US11670394B2Temperature exposure detection based on memory cell retention error rateNXP BV·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 1348US6069033AMethod of manufacturing a non-volatile memory and a CMOS transistorPHILIPS CORP·Filed 1998·Granted May 30, 2000·12 cites·10 claims
- 1446US7148103B2Multilevel poly-Si tiling for semiconductor circuit manufactureKONINKL PHILIPS ELECTRONICS NV·Filed 2002·Granted Dec 12, 2006·2 cites·11 claims
- 1543US2015102398A1Floating-gate device and method thereforNXP BV·Filed 2014·Application pending·0 cites
- 1633US2012043600A1Floating-Gate Device and Method ThereforVAN DER VEGT HENDERIKUS ALBERT·Filed 2010·Application pending·0 cites
- 1733US2002182807A1Semiconductor device and method of manufacturing sameFiled 2002·Application pending·0 cites
- 1832US2001004120A1Non-volatile memory cells, high voltage transistors and logic transistors integrated on a single chipFiled 2000·Application pending·0 cites
- 1928US2011298034A1Memory cellBOTER JOHAN DICK·Filed 2011·Application pending·0 cites
- 2024US2002130352A1Semiconductor device comprising an EEPROM memory and a FLASH-EPROM memory, and method of manufacturing such a semiconductor deviceFiled 2001·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Guido Jozef Maria Dormans files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →