Inventor · disambiguated record
Guy L. Guthrie
Also filed as: GUTHRIE GUY · GUTHRIE GUY L · GUTHRIE GUY LYNN
472 granted patents·18 pending applications·5,849 citations·filing 1991–2022
99Inventor score
Top patents by PatentIndex Score
490 records- 0197US9575815B1Translation entry invalidation in a multithreaded data processing systemIBM·Filed 2015·Granted Feb 21, 2017·25 cites·7 claims
- 0296US10067713B2Efficient enforcement of barriers with respect to memory move sequencesIBM·Filed 2016·Granted Sep 4, 2018·17 cites·19 claims
- 0396US9785557B1Translation entry invalidation in a multithreaded data processing systemIBM·Filed 2016·Granted Oct 10, 2017·23 cites·20 claims
- 0496US7469318B2System bus structure for large L2 cache array topology with different latency domainsIBM·Filed 2005·Granted Dec 23, 2008·46 cites·6 claims
- 0596US6748518B1Multi-level multiprocessor speculation mechanismIBM·Filed 2000·Granted Jun 8, 2004·142 cites·6 claims
- 0695US7305522B2Victim cache using direct interventionIBM·Filed 2005·Granted Dec 4, 2007·40 cites·1 claims
- 0794US9753862B1Hybrid replacement policy in a multilevel cache memory hierarchyIBM·Filed 2016·Granted Sep 5, 2017·11 cites·13 claims
- 0894US9710394B2Translation entry invalidation in a multithreaded data processing systemIBM·Filed 2016·Granted Jul 18, 2017·10 cites·7 claims
- 0994US7584329B2Data processing system and method for efficient communication utilizing an Ig coherency stateIBM·Filed 2005·Granted Sep 1, 2009·36 cites·21 claims
- 1094US7305523B2Cache memory direct interventionIBM·Filed 2005·Granted Dec 4, 2007·38 cites·1 claims
- 1194US6691220B1Multiprocessor speculation mechanism via a barrier speculation flagIBM·Filed 2000·Granted Feb 10, 2004·101 cites·14 claims
- 1293US11106608B1Synchronizing access to shared memory by extending protection for a target address of a store-conditional requestIBM·Filed 2020·Granted Aug 31, 2021·3 cites·17 claims
- 1393US9886350B2Tracking modifications to a virtual machine image that occur during backup of the virtual machineIBM·Filed 2016·Granted Feb 6, 2018·7 cites·5 claims
- 1493US7533227B2Method for priority scheduling and priority dispatching of store conditional operations in a store queueIBM·Filed 2008·Granted May 12, 2009·29 cites·5 claims
- 1593US7475191B2Processor, data processing system and method for synchronizing access to data in shared memoryIBM·Filed 2005·Granted Jan 6, 2009·33 cites·15 claims
- 1692US11748267B1Concurrent processing of translation entry invalidation requests in a processor coreIBM·Filed 2022·Granted Sep 5, 2023·2 cites·19 claims
- 1792US9727489B1Counter-based victim selection in a cache memoryIBM·Filed 2016·Granted Aug 8, 2017·8 cites·18 claims
- 1892US7827354B2Victim cache using direct interventionIBM·Filed 2007·Granted Nov 2, 2010·23 cites·9 claims
- 1992US7447845B2Data processing system, processor and method of data processing in which local memory access requests are serviced by state machines with differing functionalityIBM·Filed 2006·Granted Nov 4, 2008·29 cites·18 claims
- 2092US6880073B2Speculative execution of instructions and processes before completion of preceding barrier operationsIBM·Filed 2000·Granted Apr 12, 2005·78 cites·26 claims
- 2192US6625660B1Multiprocessor speculation mechanism for efficiently managing multiple barrier operationsIBM·Filed 2000·Granted Sep 23, 2003·74 cites·14 claims
- 2292US5784576AMethod and apparatus for adding and removing components of a data processing system without powering downIBM·Filed 1996·Granted Jul 21, 1998·197 cites·15 claims
- 2391US9772945B1Translation entry invalidation in a multithreaded data processing systemIBM·Filed 2016·Granted Sep 26, 2017·9 cites·20 claims
- 2491US8935513B2Processor performance improvement for instruction sequences that include barrier instructionsGUTHRIE GUY L·Filed 2012·Granted Jan 13, 2015·14 cites·13 claims
- 2591US8412888B2Cache-based speculation of stores following synchronizing operationsGUTHRIE GUY L·Filed 2011·Granted Apr 2, 2013·13 cites·11 claims
- 2691US7069494B2Application of special ECC matrix for solving stuck bit faults in an ECC protected mechanismIBM·Filed 2003·Granted Jun 27, 2006·48 cites·15 claims
- 2791US6963967B1System and method for enabling weak consistent storage advantage to a firmly consistent storage architectureIBM·Filed 2000·Granted Nov 8, 2005·71 cites·9 claims
- 2891US6609192B1System and method for asynchronously overlapping storage barrier operations with old and new storage operationsIBM·Filed 2000·Granted Aug 19, 2003·70 cites·9 claims
- 2990US9727488B1Counter-based victim selection in a cache memoryIBM·Filed 2016·Granted Aug 8, 2017·7 cites·18 claims
- 3090US9632942B2Expedited servicing of store operations in a data processing systemIBM·Filed 2015·Granted Apr 25, 2017·6 cites·13 claims
- 3190US8140771B2Partial cache line storage-modifying operation based upon a hintARIMILLI RAVI K·Filed 2008·Granted Mar 20, 2012·19 cites·12 claims
- 3290US7536513B2Data processing system, cache system and method for issuing a request on an interconnect fabric without reference to a lower level cache based upon a tagged cache stateIBM·Filed 2005·Granted May 19, 2009·23 cites·18 claims
- 3390US7073043B2Multiprocessor system supporting multiple outstanding TLBI operations per partitionIBM·Filed 2003·Granted Jul 4, 2006·67 cites·20 claims
- 3489US10970215B1Cache snooping mode extending coherence protection for certain requestsIBM·Filed 2019·Granted Apr 6, 2021·6 cites·20 claims
- 3589US10318435B2Ensuring forward progress for nested translations in a memory management unitIBM·Filed 2017·Granted Jun 11, 2019·6 cites·13 claims
- 3689US8683140B2Cache-based speculation of stores following synchronizing operationsGUTHRIE GUY L·Filed 2012·Granted Mar 25, 2014·10 cites·8 claims
- 3789US6748501B2Microprocessor reservation mechanism for a hashed address systemIBM·Filed 2000·Granted Jun 8, 2004·59 cites·17 claims
- 3889US6704843B1Enhanced multiprocessor response bus protocol enabling intra-cache line reference exchangeIBM·Filed 2000·Granted Mar 9, 2004·59 cites·21 claims
- 3989US6405289B1Multiprocessor system in which a cache serving as a highest point of coherency is indicated by a snoop responseIBM·Filed 1999·Granted Jun 11, 2002·148 cites·14 claims
- 4088US9880905B2Tracking modifications to a virtual machine image that occur during backup of the virtual machineIBM·Filed 2014·Granted Jan 30, 2018·7 cites·10 claims
- 4188US9715459B2Translation entry invalidation in a multithreaded data processing systemIBM·Filed 2015·Granted Jul 25, 2017·5 cites·13 claims
- 4288US9652399B2Expedited servicing of store operations in a data processing systemIBM·Filed 2015·Granted May 16, 2017·5 cites·6 claims
- 4388US9645937B2Expedited servicing of store operations in a data processing systemIBM·Filed 2015·Granted May 9, 2017·5 cites·13 claims
- 4488US9632943B2Expedited servicing of store operations in a data processing systemIBM·Filed 2015·Granted Apr 25, 2017·5 cites·6 claims
- 4588US9336142B2Cache configured to log addresses of high-availability data via a non-blocking channelIBM·Filed 2013·Granted May 10, 2016·9 cites·13 claims
- 4688US7444494B2Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a history-based predictionIBM·Filed 2005·Granted Oct 28, 2008·14 cites·6 claims
- 4788US6601144B1Dynamic cache management in a symmetric multiprocessor system via snoop operation sequence analysisIBM·Filed 2000·Granted Jul 29, 2003·53 cites·36 claims
- 4887US10423550B2Managing efficient selection of a particular processor thread for handling an interruptIBM·Filed 2017·Granted Sep 24, 2019·4 cites·20 claims
- 4987US9514046B1Dynamic detection and software correction of incorrect lock and atomic update hint bitsIBM·Filed 2015·Granted Dec 6, 2016·6 cites·10 claims
- 5087US9501411B2Cache backing store for transactional memoryIBM·Filed 2014·Granted Nov 22, 2016·8 cites·12 claims
Showing the top 50 of 490 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →