Inventor · disambiguated record
Harsh Chilwal
Also filed as: CHILWAL HARSH
5 granted patents·21 citations·filing 2005–2021
76Inventor score
Top patents by PatentIndex Score
5 records- 0186US11797742B1Power aware real number modeling in dynamic verification of mixed-signal integrated circuit designSYNOPSYS INC·Filed 2021·Granted Oct 24, 2023·5 cites·20 claims
- 0278US10769329B1Retention model with RTL-compatible default operating modeSYNOPSYS INC·Filed 2019·Granted Sep 8, 2020·7 cites·17 claims
- 0367US7546566B2Method and system for verification of multi-voltage circuit designSYNOPSYS INC·Filed 2007·Granted Jun 9, 2009·5 cites·40 claims
- 0463US7558287B2Combined hardware and software implementation of link capacity adjustment scheme (LCAS) in SONET (synchronous optical network) virtual concatenation (VCAT)TRANSWITCH CORP·Filed 2005·Granted Jul 7, 2009·3 cites·12 claims
- 0548US8255859B2Method and system for verification of multi-voltage circuit designCHILWAL HARSH·Filed 2009·Granted Aug 28, 2012·1 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →