Inventor · disambiguated record
Henry Descalzo Bathan
Also filed as: BATHAN HENRY D · BATHAN HENRY DESCALZO
159 granted patents·12 pending applications·1,193 citations·filing 2003–2025
99Inventor score
Files withSTATS CHIPPAC LTD55CAMACHO ZIGMUND RAMIREZ52BATHAN HENRY DESCALZO18CAMACHO ZIGMUND R13SEMTECH CORP7
Top patents by PatentIndex Score
171 records- 0199US7517733B2Leadframe design for QFN package with top terminal leadsSTATS CHIPPAC LTD·Filed 2007·Granted Apr 14, 2009·125 cites·22 claims
- 0298US8993376B2Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor dieCAMACHO ZIGMUND R·Filed 2011·Granted Mar 31, 2015·52 cites·23 claims
- 0398US8420447B2Integrated circuit packaging system with flipchip leadframe and method of manufacture thereofTAY LIONEL CHIEN HUI·Filed 2011·Granted Apr 16, 2013·80 cites·20 claims
- 0498US8409922B2Semiconductor device and method of forming leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnectCAMACHO ZIGMUND R·Filed 2010·Granted Apr 2, 2013·58 cites·31 claims
- 0598US8076184B1Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor dieCAMACHO ZIGMUND R·Filed 2010·Granted Dec 13, 2011·43 cites·12 claims
- 0697US9006031B2Semiconductor device and method of forming EWLB package with standoff conductive layer over encapsulant bumpsCAMACHO ZIGMUND R·Filed 2011·Granted Apr 14, 2015·40 cites·24 claims
- 0797US7851246B2Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the deviceSTATS CHIPPAC LTD·Filed 2007·Granted Dec 14, 2010·40 cites·18 claims
- 0896US8241956B2Semiconductor device and method of forming wafer level multi-row etched lead packageCAMACHO ZIGMUND R·Filed 2010·Granted Aug 14, 2012·25 cites·20 claims
- 0996US7977579B2Multiple flip-chip integrated circuit package systemSTATS CHIPPAC LTD·Filed 2006·Granted Jul 12, 2011·40 cites·20 claims
- 1095US7888181B2Method of forming a wafer level package with RDL interconnection over encapsulant between bump and semiconductor dieSTATS CHIPPAC LTD·Filed 2008·Granted Feb 15, 2011·25 cites·23 claims
- 1194US7400049B2Integrated circuit package system with heat sinkSTATS CHIPPAC LTD·Filed 2006·Granted Jul 15, 2008·34 cites·12 claims
- 1292US8377750B2Integrated circuit packaging system with multiple row leads and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2010·Granted Feb 19, 2013·14 cites·17 claims
- 1392US8035207B2Stackable integrated circuit package system with recessSTATS CHIPPAC LTD·Filed 2006·Granted Oct 11, 2011·23 cites·20 claims
- 1491US7790576B2Semiconductor device and method of forming through hole vias in die extension region around periphery of dieSTATS CHIPPAC LTD·Filed 2007·Granted Sep 7, 2010·15 cites·18 claims
- 1590US7691674B1Integrated circuit packaging system with stacked device and method of manufacturing thereofSTATS CHIPPAC LTD·Filed 2009·Granted Apr 6, 2010·19 cites·20 claims
- 1690US7563647B2Integrated circuit package system with interconnect supportSTATS CHIPPAC LTD·Filed 2006·Granted Jul 21, 2009·17 cites·14 claims
- 1789US8866275B2Leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnectSTATS CHIPPAC LTD·Filed 2013·Granted Oct 21, 2014·8 cites·25 claims
- 1889US8193037B1Integrated circuit packaging system with pad connection and method of manufacture thereofBATHAN HENRY DESCALZO·Filed 2010·Granted Jun 5, 2012·11 cites·11 claims
- 1988US8110440B2Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structureBATHAN HENRY D·Filed 2009·Granted Feb 7, 2012·14 cites·31 claims
- 2088US8106499B2Integrated circuit packaging system with a dual substrate package and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2009·Granted Jan 31, 2012·15 cites·20 claims
- 2186US8334584B2Integrated circuit packaging system with quad flat no-lead package and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2009·Granted Dec 18, 2012·13 cites·20 claims
- 2286US8120149B2Integrated circuit package systemCAMACHO ZIGMUND RAMIREZ·Filed 2006·Granted Feb 21, 2012·14 cites·20 claims
- 2386US7479692B2Integrated circuit package system with heat sinkSTATS CHIPPAC LTD·Filed 2006·Granted Jan 20, 2009·13 cites·20 claims
- 2485US8120156B2Integrated circuit package system with die on base packageCAMACHO ZIGMUND RAMIREZ·Filed 2006·Granted Feb 21, 2012·13 cites·20 claims
- 2584US12293960B2Side-solderable leadless packageSEMTECH CORP·Filed 2023·Granted May 6, 2025·0 cites·11 claims
- 2684US8354742B2Method and apparatus for a package having multiple stacked dieSTATS CHIPPAC LTD·Filed 2008·Granted Jan 15, 2013·11 cites·30 claims
- 2784US8043894B2Integrated circuit package system with redistribution layerSTATS CHIPPAC LTD·Filed 2008·Granted Oct 25, 2011·11 cites·20 claims
- 2884US7901996B2Integrated circuit package system with interconnection support and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2009·Granted Mar 8, 2011·9 cites·14 claims
- 2984US7714419B2Integrated circuit package system with shieldingSTATS CHIPPAC LTD·Filed 2007·Granted May 11, 2010·13 cites·17 claims
- 3084US6833287B1System for semiconductor package with stacked diesST ASSEMBLY TEST SERVICES INC·Filed 2003·Granted Dec 21, 2004·56 cites·20 claims
- 3183US8022539B2Integrated circuit packaging system with increased connectivity and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2008·Granted Sep 20, 2011·9 cites·7 claims
- 3283US7750451B2Multi-chip package system with multiple substratesSTATS CHIPPAC LTD·Filed 2007·Granted Jul 6, 2010·11 cites·20 claims
- 3383US2025246524A1Side-Solderable Leadless PackageSEMTECH CORP·Filed 2025·Application pending·0 cites
- 3482US9337161B2Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereofSTATS CHIPPAC LTD·Filed 2014·Granted May 10, 2016·4 cites·21 claims
- 3582US8809119B1Integrated circuit packaging system with plated leads and method of manufacture thereofESPIRITU EMMANUEL·Filed 2013·Granted Aug 19, 2014·6 cites·20 claims
- 3681US8273602B2Integrated circuit package system with integration portBATHAN HENRY DESCALZO·Filed 2008·Granted Sep 25, 2012·9 cites·20 claims
- 3781US8203214B2Integrated circuit package in package system with adhesiveless package attachBATHAN HENRY DESCALZO·Filed 2007·Granted Jun 19, 2012·7 cites·20 claims
- 3881US7274089B2Integrated circuit package system with adhesive restraintSTATS CHIPPAC LTD·Filed 2005·Granted Sep 25, 2007·9 cites·20 claims
- 3980US8643166B2Integrated circuit packaging system with leads and method of manufacturing thereofCAMACHO ZIGMUND RAMIREZ·Filed 2011·Granted Feb 4, 2014·5 cites·20 claims
- 4080US8241965B2Integrated circuit packaging system with pad connection and method of manufacture thereofBATHAN HENRY DESCALZO·Filed 2010·Granted Aug 14, 2012·5 cites·20 claims
- 4180US8203201B2Integrated circuit packaging system with leads and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2010·Granted Jun 19, 2012·5 cites·17 claims
- 4280US8072047B2Integrated circuit package system with shield and tie barCAMACHO ZIGMUND RAMIREZ·Filed 2008·Granted Dec 6, 2011·9 cites·20 claims
- 4380US7777310B2Integrated circuit package system with integral inner lead and paddleSTATS CHIPPAC LTD·Filed 2007·Granted Aug 17, 2010·7 cites·15 claims
- 4479US8803300B2Integrated circuit packaging system with protective coating and method of manufacture thereofBATHAN HENRY DESCALZO·Filed 2010·Granted Aug 12, 2014·5 cites·16 claims
- 4579US7545032B2Integrated circuit package system with stiffenerSTATS CHIPPAC LTD·Filed 2006·Granted Jun 9, 2009·8 cites·20 claims
- 4678US9177897B1Integrated circuit packaging system with trace protection layer and method of manufacture thereofDO BYUNG TAI·Filed 2013·Granted Nov 3, 2015·4 cites·20 claims
- 4777US8810015B2Integrated circuit packaging system with high lead count and method of manufacture thereofCAMACHO ZIGMUND RAMIREZ·Filed 2009·Granted Aug 19, 2014·7 cites·18 claims
- 4877US8493748B2Packaging system with hollow package and method for the sameCAMACHO ZIGMUND RAMIREZ·Filed 2007·Granted Jul 23, 2013·7 cites·18 claims
- 4977US8039302B2Semiconductor package and method of forming similar structure for top and bottom bonding padsSTATS CHIPPAC LTD·Filed 2007·Granted Oct 18, 2011·6 cites·22 claims
- 5077US7763493B2Integrated circuit package system with top and bottom terminalsSTATS CHIPPAC LTD·Filed 2007·Granted Jul 27, 2010·7 cites·20 claims
Showing the top 50 of 171 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →