Inventor · disambiguated record
Henry Horng-Fei Jyu
Also filed as: JYU HENRY · JYU HENRY HORNG-FEI
3 granted patents·1 pending application·263 citations·filing 1995–2022
78Inventor score
Technology areasG06F
Top patents by PatentIndex Score
4 records- 0184US5880967AMinimization of circuit delay and power through transistor sizingSYNOPSYS INC·Filed 1995·Granted Mar 9, 1999·125 cites·20 claims
- 0283US6209122B1Minimization of circuit delay and power through transistor sizingSYNOPSYS INC·Filed 1998·Granted Mar 27, 2001·117 cites·19 claims
- 0369US6820243B1Hybrid system of static analysis and dynamic simulation for circuit designNASSDA CORP·Filed 2001·Granted Nov 16, 2004·21 cites·27 claims
- 0441US2022327272A1Real time view swapping (rtvs) in a mixed signal simulationSYNOPSYS INC·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →