Inventor · disambiguated record
Henry Packard Moreton
Also filed as: MORETON HENRY · MORETON HENRY P · MORETON HENRY PACKARD
130 granted patents·14 pending applications·3,809 citations·filing 1993–2025
99Inventor score
Top patents by PatentIndex Score
144 records- 0199US9262797B2Multi-sample surface processing using one sampleNVIDIA CORP·Filed 2013·Granted Feb 16, 2016·132 cites·16 claims
- 0299US9165399B2System, method, and computer program product for inputting modified coverage data into a pixel shaderNVIDIA CORP·Filed 2012·Granted Oct 20, 2015·132 cites·12 claims
- 0398US7620793B1Mapping memory partitions to virtual memory pagesNVIDIA CORP·Filed 2006·Granted Nov 17, 2009·93 cites·18 claims
- 0497US5933650AAlignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 1997·Granted Aug 3, 1999·352 cites·44 claims
- 0596US8321849B2Virtual architecture and instruction set for parallel thread computingNICKOLLS JOHN R·Filed 2007·Granted Nov 27, 2012·88 cites·23 claims
- 0696US6724394B1Programmable pixel shading architectureNVIDIA CORP·Filed 2001·Granted Apr 20, 2004·139 cites·17 claims
- 0796US5835133AOptical system for single camera stereo videoSILICON GRAPHICS INC·Filed 1996·Granted Nov 10, 1998·272 cites·19 claims
- 0895US5864703AMethod for providing extended precision in SIMD vector arithmetic operationsMIPS TECH INC·Filed 1997·Granted Jan 26, 1999·204 cites·40 claims
- 0994US8120607B1Boundary transition region stitching for tessellationLEGAKIS JUSTIN S·Filed 2008·Granted Feb 21, 2012·41 cites·18 claims
- 1094US7920701B1System and method for digital content protectionNVIDIA CORP·Filed 2005·Granted Apr 5, 2011·25 cites·21 claims
- 1194US7916155B1Complementary anti-aliasing sample patternsNVIDIA CORP·Filed 2007·Granted Mar 29, 2011·34 cites·19 claims
- 1294US6731298B1System, method and article of manufacture for z-texture mappingNVIDIA CORP·Filed 2000·Granted May 4, 2004·85 cites·24 claims
- 1393US8074058B2Providing extended precision in SIMD vector arithmetic operationsVAN HOOK TIMOTHY J·Filed 2009·Granted Dec 6, 2011·24 cites·20 claims
- 1493US6906716B2Integrated tessellator in a graphics processing unitNVIDIA CORP·Filed 2003·Granted Jun 14, 2005·69 cites·20 claims
- 1593US6900810B1User programmable geometry engineNVIDIA CORP·Filed 2003·Granted May 31, 2005·78 cites·25 claims
- 1693US6870540B1System, method and computer program product for a programmable pixel processing model with instruction setNVIDIA CORP·Filed 2001·Granted Mar 22, 2005·77 cites·32 claims
- 1792US10699427B2Method and apparatus for obtaining sampled positions of texturing operationsNVIDIA CORP·Filed 2019·Granted Jun 30, 2020·9 cites·20 claims
- 1892US7197625B1Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 2000·Granted Mar 27, 2007·61 cites·18 claims
- 1992US6828980B1System, method and computer program product for z-texture mappingNVIDIA CORP·Filed 2003·Granted Dec 7, 2004·56 cites·34 claims
- 2092US6266758B1Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 1999·Granted Jul 24, 2001·193 cites·13 claims
- 2191US10424074B1Method and apparatus for obtaining sampled positions of texturing operationsNVIDIA CORP·Filed 2018·Granted Sep 24, 2019·7 cites·20 claims
- 2291US7564456B1Apparatus and method for raster tile coalescingNVIDIA CORP·Filed 2006·Granted Jul 21, 2009·27 cites·18 claims
- 2391US7233335B2System and method for reserving and managing memory spaces in a memory resourceNVIDIA CORP·Filed 2003·Granted Jun 19, 2007·57 cites·50 claims
- 2490US12260486B2Displaced micro-meshes for ray and path tracingNVIDIA CORP·Filed 2022·Granted Mar 25, 2025·1 cites·19 claims
- 2590US7420557B1Vertex processing when w=0NVIDIA CORP·Filed 2005·Granted Sep 2, 2008·21 cites·23 claims
- 2689US8941669B1Split push buffer rendering for scalabilityMORETON HENRY P·Filed 2007·Granted Jan 27, 2015·24 cites·20 claims
- 2789US8212825B1System and method for geometry shadingEVERITT CASS W·Filed 2007·Granted Jul 3, 2012·20 cites·20 claims
- 2889US7502035B1Apparatus, system, and method for multi-sample pixel coalescingNVIDIA CORP·Filed 2007·Granted Mar 10, 2009·19 cites·7 claims
- 2989US7400325B1Culling before setup in viewport and culling unitNVIDIA CORP·Filed 2004·Granted Jul 15, 2008·54 cites·19 claims
- 3089US7292242B1Clipping with addition of vertices to existing primitivesNVIDA CORP·Filed 2004·Granted Nov 6, 2007·58 cites·21 claims
- 3189US6940515B1User programmable primitive engineNVIDIA CORP·Filed 2003·Granted Sep 6, 2005·52 cites·25 claims
- 3289US6600488B1Tessellation system, method and computer program product with interior and surrounding meshesNVIDIA CORP·Filed 2002·Granted Jul 29, 2003·44 cites·35 claims
- 3389US6597356B1Integrated tessellator in a graphics processing unitNVIDIA CORP·Filed 2000·Granted Jul 22, 2003·46 cites·20 claims
- 3488US8558833B1System and method for symmetric parameterization of independently tessellated patchesMORETON HENRY PACKARD·Filed 2009·Granted Oct 15, 2013·18 cites·20 claims
- 3588US7739556B1Hardware override of application programming interface programmed stateNVIDIA CORP·Filed 2007·Granted Jun 15, 2010·18 cites·19 claims
- 3688US5768445ACompression and decompression scheme performed on shared workstation memory by media coprocessorSILICON GRAPHICS INC·Filed 1996·Granted Jun 16, 1998·140 cites·15 claims
- 3787US10991152B2Adaptive shading in a graphics processing pipelineNVIDIA CORP·Filed 2017·Granted Apr 27, 2021·5 cites·25 claims
- 3887US8482567B1Line rasterization techniquesMORETON HENRY PACKARD·Filed 2006·Granted Jul 9, 2013·18 cites·20 claims
- 3987US8094158B1Using programmable constant buffers for multi-threaded processingALLEN ROGER L·Filed 2006·Granted Jan 10, 2012·21 cites·20 claims
- 4087US6738062B1Displaced subdivision surface representationNVIDIA CORP·Filed 2001·Granted May 18, 2004·45 cites·13 claims
- 4187US5812147AInstruction methods for performing data formatting while moving data between memory and a vector register fileSILICON GRAPHICS INC·Filed 1996·Granted Sep 22, 1998·166 cites·26 claims
- 4286US8605085B1System and method for perspective corrected tessellation using parameter space warpingMORETON HENRY PACKARD·Filed 2009·Granted Dec 10, 2013·15 cites·17 claims
- 4386US7793077B2Alignment and ordering of vector elements for single instruction multiple data processingMIPS TECH INC·Filed 2007·Granted Sep 7, 2010·12 cites·14 claims
- 4486US6788312B1Method for improving quality in graphics pipelines through a frame's top and bottom field processing with conditional thresholding and weighting techniquesNVIDIA CORP·Filed 2001·Granted Sep 7, 2004·34 cites·16 claims
- 4586US5636338AMethod for designing curved shapes for use by a computerSILICON GRAPHICS INC·Filed 1993·Granted Jun 3, 1997·80 cites·101 claims
- 4685US8751771B2Efficient implementation of arrays of structures on SIMT and SIMD architecturesFAHS BRIAN·Filed 2011·Granted Jun 10, 2014·9 cites·20 claims
- 4785US7292239B1Cull before attribute readNVIDIA CORP·Filed 2004·Granted Nov 6, 2007·30 cites·16 claims
- 4884US9552667B2Adaptive shading in a graphics processing pipelineNVIDIA CORP·Filed 2013·Granted Jan 24, 2017·6 cites·25 claims
- 4984US7439988B1Apparatus, system, and method for clipping graphics primitives with respect to a clipping planeNVIDIA CORP·Filed 2005·Granted Oct 21, 2008·14 cites·15 claims
- 5083US9747718B2System, method, and computer program product for performing object-space shadingNVIDIA CORP·Filed 2015·Granted Aug 29, 2017·5 cites·20 claims
Showing the top 50 of 144 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →