Inventor · disambiguated record
Helmut Puchner
Also filed as: PUCHNER HELMUT
42 granted patents·1 pending application·1,359 citations·filing 1998–2015
98Inventor score
Top patents by PatentIndex Score
43 records- 0198US6358806B1Silicon carbide CMOS channelLSI LOGIC CORP·Filed 2001·Granted Mar 19, 2002·246 cites·20 claims
- 0295US8163660B2SONOS type stacks for nonvolatile change trap memory devices and methods to form the samePUCHNER HELMUT·Filed 2009·Granted Apr 24, 2012·39 cites·20 claims
- 0395US6331468B1Formation of integrated circuit structure using one or more silicon layers for implantation and out-diffusion in formation of defect-free source/drain regions and also for subsequent formation of silicon nitride spacersLSI LOGIC CORP·Filed 1998·Granted Dec 18, 2001·295 cites·18 claims
- 0494US7838937B1Circuits providing ESD protection to high voltage laterally diffused metal oxide semiconductor (LDMOS) transistorsCYPRESS SEMICONDUCTOR CORP·Filed 2005·Granted Nov 23, 2010·36 cites·17 claims
- 0593US8283727B1Circuit with electrostatic discharge protectionWALKER ANDREW·Filed 2009·Granted Oct 9, 2012·35 cites·19 claims
- 0693US6544854B1Silicon germanium CMOS channelLSI LOGIC CORP·Filed 2000·Granted Apr 8, 2003·70 cites·18 claims
- 0791US8861271B1High reliability non-volatile static random access memory devices, methods and systemsZAIN SUHAIL·Filed 2012·Granted Oct 14, 2014·23 cites·20 claims
- 0891US7659558B1Silicon controlled rectifier electrostatic discharge clamp for a high voltage laterally diffused MOS transistorCYPRESS SEMICONDUCTOR CORP·Filed 2005·Granted Feb 9, 2010·22 cites·20 claims
- 0990US8129788B1Capacitor triggered silicon controlled rectifierWALKER ANDREW·Filed 2007·Granted Mar 6, 2012·20 cites·5 claims
- 1090US6413881B1Process for forming thin gate oxide with enhanced reliability by nitridation of upper surface of gate of oxide to form barrier of nitrogen atoms in upper surface region of gate oxide, and resulting productLSI LOGIC CORP·Filed 2000·Granted Jul 2, 2002·60 cites·10 claims
- 1189US8278684B1Voltage protection deviceWALKER ANDREW J·Filed 2007·Granted Oct 2, 2012·17 cites·8 claims
- 1288US8143673B1Circuit with electrostatic discharge protectionWALKER ANDREW·Filed 2009·Granted Mar 27, 2012·18 cites·20 claims
- 1388US6323106B1Dual nitrogen implantation techniques for oxynitride formation in semiconductor devicesLSI LOGIC CORP·Filed 1999·Granted Nov 27, 2001·91 cites·18 claims
- 1487US8841727B1Circuit with electrostatic discharge protectionWALKER ANDREW·Filed 2012·Granted Sep 23, 2014·9 cites·8 claims
- 1585US7667241B1Electrostatic discharge protection deviceCYPRESS SEMICONDUCTOR CORP·Filed 2007·Granted Feb 23, 2010·12 cites·19 claims
- 1685US6511925B1Process for forming high dielectric constant gate dielectric for integrated circuit structureLSI LOGIC CORP·Filed 2001·Granted Jan 28, 2003·32 cites·27 claims
- 1785US6156620AIsolation trench in semiconductor substrate with nitrogen-containing barrier region, and process for forming sameLSI LOGIC CORP·Filed 1998·Granted Dec 5, 2000·82 cites·17 claims
- 1882US6472715B1Reduced soft error rate (SER) construction for integrated circuit structuresLSI LOGIC CORP·Filed 2000·Granted Oct 29, 2002·34 cites·13 claims
- 1981US7859899B1Non-volatile memory and method of operating the sameCYPRESS SEMICONDUCTOR CORP·Filed 2008·Granted Dec 28, 2010·16 cites·19 claims
- 2078US7592661B1CMOS embedded high voltage transistorCYPRESS SEMICONDUCTOR CORP·Filed 2006·Granted Sep 22, 2009·8 cites·18 claims
- 2178US6734081B1Shallow trench isolation structure for laser thermal processingLSI LOGIC CORP·Filed 2001·Granted May 11, 2004·21 cites·17 claims
- 2277US6455363B1System to improve ser immunity and punchthroughLSI LOGIC CORP·Filed 2000·Granted Sep 24, 2002·21 cites·16 claims
- 2375US6144076AWell formation For CMOS devices integrated circuit structuresLSI LOGIC CORP·Filed 1998·Granted Nov 7, 2000·51 cites·21 claims
- 2474US7936023B1High voltage diodeCYPRESS SEMICONDUCTOR CORP·Filed 2007·Granted May 3, 2011·6 cites·18 claims
- 2573US7105413B2Methods for forming super-steep diffusion region profiles in MOS devices and resulting semiconductor topographiesCYPRESS SEMICONDUCTOR CORP·Filed 2005·Granted Sep 12, 2006·9 cites·13 claims
- 2672US7768068B1Drain extended MOS transistor with increased breakdown voltageCYPRESS SEMICONDUCTOR CORP·Filed 2007·Granted Aug 3, 2010·5 cites·20 claims
- 2772US6977400B2Silicon germanium CMOS channelLSI LOGIC CORP·Filed 2003·Granted Dec 20, 2005·15 cites·1 claims
- 2871US9553175B2SONOS type stacks for nonvolatile charge trap memory devices and methods to form the sameCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted Jan 24, 2017·1 cites·20 claims
- 2966US9105740B2SONOS type stacks for nonvolatile changetrap memory devices and methods to form the sameCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Aug 11, 2015·1 cites·19 claims
- 3064US6504219B1Indium field implant for punchthrough protection in semiconductor devicesLSI LOGIC CORP·Filed 2001·Granted Jan 7, 2003·10 cites·9 claims
- 3158US8063655B2Method and circuit for reducing degradation in a regulated circuitPUCHNER HELMUT·Filed 2006·Granted Nov 22, 2011·4 cites·14 claims
- 3258US6486064B1Shallow junction formationLSI LOGIC CORP·Filed 2000·Granted Nov 26, 2002·5 cites·17 claims
- 3357US6342429B1Method of fabricating an indium field implant for punchthrough protection in semiconductor devicesLSI LOGIC CORP·Filed 1999·Granted Jan 29, 2002·18 cites·14 claims
- 3455US9570152B1High reliability non-volatile static random access memory devices, methods and systemsCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted Feb 14, 2017·1 cites·20 claims
- 3555US6727165B1Fabrication of metal contacts for deep-submicron technologiesLSI LOGIC CORP·Filed 2001·Granted Apr 27, 2004·6 cites·22 claims
- 3654US9842629B2Memory cell array latchup preventionCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted Dec 12, 2017·1 cites·17 claims
- 3754US9304953B2Memory controller devices, systems and methods for translating memory requests between first and second formats for high reliability memory devicesZAIN SUHAIL·Filed 2012·Granted Apr 5, 2016·1 cites·6 claims
- 3852US6613651B1Integrated circuit isolation systemLSI LOGIC CORP·Filed 2000·Granted Sep 2, 2003·4 cites·12 claims
- 3947US6831348B2Integrated circuit isolation systemLSI LOGIC CORP·Filed 2003·Granted Dec 14, 2004·2 cites·3 claims
- 4045US6090651ADepletion free polysilicon gate electrodesLSI LOGIC CORP·Filed 1999·Granted Jul 18, 2000·9 cites·20 claims
- 4141US6605846B2Shallow junction formationLSI LOGIC CORP·Filed 2002·Granted Aug 12, 2003·0 cites·3 claims
- 4239US2002173087A1System to improve SER immunity and punchthroughLSI LOGIC CORP·Filed 2002·Application pending·0 cites
- 4334US6759337B1Process for etching a controllable thickness of oxide on an integrated circuit structure on a semiconductor substrate using nitrogen plasma and plasma and an rf bias applied to the substrateLSI LOGIC CORP·Filed 1999·Granted Jul 6, 2004·3 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →