Inventor · disambiguated record
Hillel Mendelson
Also filed as: MENDELSON HILLEL
12 granted patents·19 citations·filing 2018–2023
84Inventor score
Top patents by PatentIndex Score
12 records- 0192US11226370B1Recoverable exceptions generation and handling for post-silicon validationIBM·Filed 2020·Granted Jan 18, 2022·5 cites·20 claims
- 0289US11263150B2Testing address translation cacheIBM·Filed 2020·Granted Mar 1, 2022·3 cites·20 claims
- 0384US11194705B2Automatically introducing register dependencies to testsIBM·Filed 2020·Granted Dec 7, 2021·2 cites·18 claims
- 0483US10496449B1Verification of atomic memory operationsIBM·Filed 2018·Granted Dec 3, 2019·6 cites·19 claims
- 0573US11204859B2Partial-results post-silicon hardware exerciserIBM·Filed 2019·Granted Dec 21, 2021·2 cites·15 claims
- 0672US11200126B2Utilizing translation tables for testing processorsIBM·Filed 2020·Granted Dec 14, 2021·1 cites·20 claims
- 0760US11796593B2Compiler-based code generation for post-silicon validationSYNOPSYS INC·Filed 2021·Granted Oct 24, 2023·0 cites·20 claims
- 0856US12353307B2Random instruction-side stressing in post-silicon validationSYNOPSYS INC·Filed 2022·Granted Jul 8, 2025·0 cites·20 claims
- 0955US12174750B2Validating address space context switches by loading an alternative address space from an address translation independent locationIBM·Filed 2022·Granted Dec 24, 2024·0 cites·20 claims
- 1055US11907088B2Testing of hardware queue systems using on device test generationSYNOPSYS INC·Filed 2021·Granted Feb 20, 2024·0 cites·20 claims
- 1150US12203986B2Random function selection and insertion during compilation for post-silicon validationIBM·Filed 2023·Granted Jan 21, 2025·0 cites·20 claims
- 1248US11182265B2Method and apparatus for test generationIBM·Filed 2019·Granted Nov 23, 2021·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →