Inventor · disambiguated record
Hiroyasu Nakayama
Also filed as: NAKAYAMA HIROYASU
17 granted patents·2 pending applications·112 citations·filing 1996–2011
92Inventor score
Top patents by PatentIndex Score
19 records- 0189US8604571B2Thermoelectric conversion deviceUCHIDA KENICHI·Filed 2009·Granted Dec 10, 2013·12 cites·8 claims
- 0282US8666691B2Test apparatus and test methodISHIKAWA SHINICHI·Filed 2011·Granted Mar 4, 2014·8 cites·20 claims
- 0376US6587983B1Apparatus and method of testing a semiconductor deviceADVANTEST CORP·Filed 2000·Granted Jul 1, 2003·26 cites·18 claims
- 0475US8362791B2Test apparatus additional module and test methodADVANTEST CORP·Filed 2009·Granted Jan 29, 2013·8 cites·18 claims
- 0568US8686525B2Magnetic sensor and magnetic memorySAITOH EIJI·Filed 2010·Granted Apr 1, 2014·3 cites·8 claims
- 0666US8059547B2Test apparatus and test methodGOISHI MASARU·Filed 2008·Granted Nov 15, 2011·4 cites·10 claims
- 0761US8149721B2Test apparatus and test methodISHIKAWA SHINICHI·Filed 2009·Granted Apr 3, 2012·2 cites·6 claims
- 0859US6604058B2Semiconductor device testing apparatus and method for testing semiconductor deviceADVANTEST CORP·Filed 2001·Granted Aug 5, 2003·9 cites·31 claims
- 0957US5903745ATiming generator for plural reference clocksADVANTEST CORP·Filed 1996·Granted May 11, 1999·21 cites·5 claims
- 1053US7472327B2Pattern generator and test apparatusADVANTEST CORP·Filed 2005·Granted Dec 30, 2008·2 cites·10 claims
- 1150US8165027B2Test apparatus and test methodISHIKAWA SHINICHI·Filed 2009·Granted Apr 24, 2012·0 cites·17 claims
- 1248US8483073B2Test apparatus and test methodISHIKAWA SHINICHI·Filed 2009·Granted Jul 9, 2013·0 cites·13 claims
- 1348US7015685B2Semiconductor testerADVANTEST CORP·Filed 2004·Granted Mar 21, 2006·4 cites·6 claims
- 1446US7235995B2Test apparatus and testing methodADVANTEST CORP·Filed 2005·Granted Jun 26, 2007·1 cites·5 claims
- 1544US8692566B2Test apparatus and test methodISHIKAWA SHINICHI·Filed 2011·Granted Apr 8, 2014·0 cites·16 claims
- 1641US8743702B2Test apparatus and test methodISHIKAWA SHINICHI·Filed 2010·Granted Jun 3, 2014·0 cites·8 claims
- 1740US6058486ATiming generator for plural reference clock frequenciesADVANTEST CORP·Filed 1998·Granted May 2, 2000·12 cites·9 claims
- 1837US2012136603A1Test apparatus and debug methodISHIKAWA SHINICHI·Filed 2011·Application pending·0 cites
- 1937US2006195722A1Pattern generator and testing apparatusADVANTEST CORP·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →