Inventor · disambiguated record
Hiroyuki Yasoshima
Also filed as: YASOSHIMA HIROYUKI
8 granted patents·2 pending applications·90 citations·filing 1996–2010
86Inventor score
Files withMATSUSHITA ELECTRIC INDUSTRIAL CO LTD4ZENTEK TECHNOLOGY JAPAN INC3YASOSHIMA HIROYUKI2ZENTEK TECHNOLOGY1
Top patents by PatentIndex Score
10 records- 0183US7484020B2SDIO controllerZENTEK TECHNOLOGY JAPAN INC·Filed 2006·Granted Jan 27, 2009·15 cites·8 claims
- 0276US7624216B2Host controllerZENTEK TECHNOLOGY·Filed 2005·Granted Nov 24, 2009·11 cites·7 claims
- 0374US7197583B2SDIO controllerZENTEK TECHNOLOGY JAPAN INC·Filed 2004·Granted Mar 27, 2007·21 cites·10 claims
- 0459US5847666AData transmitter and method object code generator and method digital signal processor and code generator and methodMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1996·Granted Dec 8, 1998·21 cites·44 claims
- 0549US2009024773A1Host controllerZENTEK TECHNOLOGY JAPAN INC·Filed 2008·Application pending·0 cites
- 0647US5996069AMethod and circuit for delayed branch control and method and circuit for conditional-flag rewriting controlMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1997·Granted Nov 30, 1999·18 cites·6 claims
- 0746US7877425B2Method for managing file using network structure, operation object display limiting program, and recording mediumYASOSHIMA HIROYUKI·Filed 2003·Granted Jan 25, 2011·2 cites·9 claims
- 0842US8307018B2Method for managing file using network structure, operation object display limiting program and recording mediumYASOSHIMA HIROYUKI·Filed 2010·Granted Nov 6, 2012·0 cites·10 claims
- 0938US2002078317A1First-in, first-out (FIFO) memory with moving boundaryMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 2000·Application pending·0 cites
- 1029US6055626AMethod and circuit for delayed branch control and method and circuit for conditional-flag rewriting controlMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1998·Granted Apr 25, 2000·2 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →