Host controller

Abstract

A versatile SDIO host controller capable of connecting to standardized general interfaces is provided. An SDIO host controller as a one-chip semiconductor integrated circuit device comprising: at least one core of an SDIO host, the core including an SD host engine and an SD host register set and memory that control the SD host engine; a plurality of CPU interfaces that control the SDIO host; and at least one selector that selects among the CPU interfaces. In particular, the SDIO host controller preferably comprises at least an ATA interface and an ATA-SD protocol conversion engine.

1 . A method of duplicating a memory card in a memory card duplication apparatus comprising: an IDE host controller; a reading memory card host controller connected with the IDE host controller via an ATA interface; a writing memory card host controller connected with the IDE host controller via an ATA interface and directly connected with the reading host controller by a data bus; and a selector circuit, the method characterized by comprising the steps of:
 (a) the IDE host controller issuing a read DMA command to the reading host controller that reads a memory card containing data to be duplicated;   (b) on receiving the read DMA command (Read DMA), the reading host controller reading the data to be duplicated from the memory card containing the data and accumulating the data in a buffer of the reading host controller;   (c) once the data is accumulated, the reading host controller making a DMA request signal (dmarq 1 );   (d) after receiving the DMA request signal (dmarq 1 ), the IDE host controller issuing a write DMA command (Write DMA) to the writing host controller; and   (e) after receiving a DMA request signal (dmarq 2 ) from the reading host controller, the IDE host controller issuing a data transfer start signal (dmack) while electrically coupling “iordy 1 ” and “dior 2 ” by switching the selector circuit.