Inventor · disambiguated record
Hongru Ren
Also filed as: REN HONGRU
11 granted patents·1 pending application·6 citations·filing 2018–2023
81Inventor score
Top patents by PatentIndex Score
12 records- 0190US11610843B2Well tap for an integrated circuit product and methods of forming such a well tapGLOBALFOUNDRIES US INC·Filed 2021·Granted Mar 21, 2023·2 cites·13 claims
- 0289US12426278B2Resistive memory elements accessed by bipolar junction transistorsGLOBALFOUNDRIES US INC·Filed 2022·Granted Sep 23, 2025·1 cites·20 claims
- 0377US10727108B2Dummy gate isolation and method of production thereofGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 28, 2020·2 cites·5 claims
- 0476US11177182B2Vertical transistor device comprising a two-dimensional (2D) material positioned in a channel region of the device and methods of making such vertical transistor devicesGLOBALFOUNDRIES US INC·Filed 2020·Granted Nov 16, 2021·1 cites·18 claims
- 0565US12356675B2Planar transistor device comprising at least one layer of a two-dimensional (2D) materialGLOBALFOUNDRIES US INC·Filed 2023·Granted Jul 8, 2025·0 cites·19 claims
- 0662US11239087B2Fully depleted devices with slots in active regionsGLOBALFOUNDRIES US INC·Filed 2019·Granted Feb 1, 2022·0 cites·14 claims
- 0761US12513995B2Substrates of semiconductor devices having varying thicknesses of semiconductor layersGLOBALFOUNDRIES US INC·Filed 2022·Granted Dec 30, 2025·0 cites·13 claims
- 0861US12424493B2Self-aligned double patterning with mandrel manipulationGLOBALFOUNDRIES US INC·Filed 2022·Granted Sep 23, 2025·0 cites·20 claims
- 0958US10497576B1Devices with slotted active regionsGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 3, 2019·0 cites·11 claims
- 1054US11581430B2Planar transistor device comprising at least one layer of a two-dimensional (2D) material and methods for making such transistor devicesGLOBALFOUNDRIES US INC·Filed 2019·Granted Feb 14, 2023·0 cites·21 claims
- 1148US11094791B1Vertical transistor device with source/drain regions comprising a twi-dimensional (2D) material and methods of making such vertical transistor devicesGLOBALFOUNDRIES US INC·Filed 2020·Granted Aug 17, 2021·0 cites·20 claims
- 1245US2023131403A1Integrated circuit structure with spacer sized for gate contact and methods to form sameGLOBALFOUNDRIES US INC·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →