Inventor · disambiguated record
Hong Yu
Also filed as: YU HONG · YU HONG-LEE
54 granted patents·12 pending applications·697 citations·filing 1994–2019
98Inventor score
Files withGLOBALFOUNDRIES INC51YU HONG7GLOBALFOUNDRIES SG PTE LTD3GLOBALFOUNDRIES US INC1JULIEN LOIC R1
Top patents by PatentIndex Score
66 records- 0198US10083874B1Gate cut methodGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 25, 2018·38 cites·18 claims
- 0298US9455198B1Methods of removing fins so as to form isolation structures on products that include FinFET semiconductor devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 27, 2016·51 cites·20 claims
- 0398US9406676B2Method for forming single diffusion breaks between finFET devices and the resulting devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 2, 2016·41 cites·14 claims
- 0498US9368496B1Method for uniform recess depth and fill in single diffusion break for fin-type process and resulting devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 14, 2016·77 cites·14 claims
- 0597US9935104B1Fin-type field effect transistors with single-diffusion breaks and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 3, 2018·16 cites·14 claims
- 0697US9324713B1Eliminating field oxide loss prior to FinFET source/drain epitaxial growthGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 26, 2016·32 cites·13 claims
- 0796US10373877B1Methods of forming source/drain contact structures on integrated circuit productsGLOBALFOUNDRIES INC·Filed 2018·Granted Aug 6, 2019·18 cites·20 claims
- 0896US9553194B1Method for improved fin profileGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 24, 2017·19 cites·16 claims
- 0995US10090382B1Integrated circuit structure including single diffusion break and end isolation region, and methods of forming sameGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 2, 2018·14 cites·20 claims
- 1095US10014296B1Fin-type field effect transistors with single-diffusion breaks and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Jul 3, 2018·19 cites·20 claims
- 1195US9443956B2Method for forming air gap structure using carbon-containing spacerGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 13, 2016·22 cites·21 claims
- 1295US9419101B1Multi-layer spacer used in finFETGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 16, 2016·20 cites·20 claims
- 1395US9337306B2Multi-phase source/drain/gate spacer-epi formationGLOBALFOUNDRIES INC·Filed 2014·Granted May 10, 2016·26 cites·16 claims
- 1494US9159794B2Method to form wrap-around contact for finFETGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 13, 2015·15 cites·20 claims
- 1594US9024368B1Fin-type transistor structures with extended embedded stress elements and fabrication methodsGLOBALFOUNDRIES INC·Filed 2013·Granted May 5, 2015·29 cites·18 claims
- 1693US8962474B2Method for forming an air gap around a through-silicon viaYU HONG·Filed 2011·Granted Feb 24, 2015·17 cites·8 claims
- 1792US10074732B1Methods of forming short channel and long channel finFET devices so as to adjust threshold voltagesGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 11, 2018·11 cites·14 claims
- 1889US10784342B1Single diffusion breaks formed with liner protection for source and drain regionsGLOBALFOUNDRIES INC·Filed 2019·Granted Sep 22, 2020·6 cites·17 claims
- 1988US9425127B2Method for forming an air gap around a through-silicon viaGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Granted Aug 23, 2016·8 cites·17 claims
- 2087US10522679B2Selective shallow trench isolation (STI) fill for stress engineering in semiconductor structuresGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 31, 2019·6 cites·20 claims
- 2187US10083873B1Semiconductor structure with uniform gate heightsGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 25, 2018·5 cites·10 claims
- 2287US9478622B2Wrap-around contact for finFETGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 25, 2016·4 cites·18 claims
- 2387US9153693B2FinFET gate with insulated vias and method of making sameGLOBALFOUNDRIES INC·Filed 2013·Granted Oct 6, 2015·9 cites·17 claims
- 2486US10043713B1Method to reduce FinFET short channel gate heightGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 7, 2018·4 cites·9 claims
- 2584US10522410B2Performing concurrent diffusion break, gate and source/drain contact cut etch processesGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 31, 2019·4 cites·20 claims
- 2683US10475693B1Method for forming single diffusion breaks between finFET devices and the resulting devicesGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 12, 2019·3 cites·20 claims
- 2782US8916939B2Reliable contactsGLOBALFOUNDRIES SG PTE LTD·Filed 2013·Granted Dec 23, 2014·5 cites·15 claims
- 2882US5410693AMethod and apparatus for accessing a databaseWALL DATA INC·Filed 1994·Granted Apr 25, 1995·137 cites·11 claims
- 2981US10403548B2Forming single diffusion break and end isolation region after metal gate replacement, and related structureGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 3, 2019·3 cites·14 claims
- 3080US10121788B1Fin-type field effect transistors with single-diffusion breaks and methodGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 6, 2018·2 cites·20 claims
- 3180US9401416B2Method for reducing gate height variation due to overlapping masksGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 26, 2016·4 cites·21 claims
- 3278US10777637B2Integrated circuit product with a multi-layer single diffusion break and methods of making such productsGLOBALFOUNDRIES INC·Filed 2019·Granted Sep 15, 2020·2 cites·19 claims
- 3378US10566202B1Gate structures of FinFET semiconductor devicesGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 18, 2020·2 cites·20 claims
- 3477US10475890B2Scaled memory structures or other logic devices with middle of the line cutsGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 12, 2019·2 cites·14 claims
- 3577US8405222B2Integrated circuit system with via and method of manufacture thereofYU HONG·Filed 2010·Granted Mar 26, 2013·5 cites·20 claims
- 3676US9570586B2Fabrication methods facilitating integration of different device architecturesGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 14, 2017·4 cites·19 claims
- 3774US9324841B2Methods for preventing oxidation damage during FinFET fabricationGLOBALFOUNDRIES INC·Filed 2013·Granted Apr 26, 2016·3 cites·20 claims
- 3872US9230822B1Uniform gate height for mixed-type non-planar semiconductor devicesGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 5, 2016·2 cites·9 claims
- 3972US8877637B2Damascene process for aligning and bonding through-silicon-via based 3D integrated circuit stacksYU HONG·Filed 2011·Granted Nov 4, 2014·3 cites·19 claims
- 4071US10559470B2Capping structureGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 11, 2020·1 cites·18 claims
- 4171US9362176B2Uniform exposed raised structures for non-planar semiconductor devicesGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 7, 2016·2 cites·4 claims
- 4271US9093561B2Modified, etch-resistant gate structure(s) facilitating circuit fabricationGLOBALFOUNDRIES INC·Filed 2013·Granted Jul 28, 2015·2 cites·20 claims
- 4370US10580685B2Integrated single diffusion breakGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 3, 2020·1 cites·9 claims
- 4468US8519482B2Reliable contactsYU HONG·Filed 2011·Granted Aug 27, 2013·2 cites·17 claims
- 4565US8883634B2Package interconnectsYU HONG·Filed 2011·Granted Nov 11, 2014·1 cites·22 claims
- 4658US11121023B2FinFET device comprising a single diffusion break with an upper surface that is substantially coplanar with an upper surface of a finGLOBALFOUNDRIES US INC·Filed 2019·Granted Sep 14, 2021·0 cites·12 claims
- 4758US10643900B2Method to reduce FinFET short channel gate heightGLOBALFOUNDRIES INC·Filed 2018·Granted May 5, 2020·0 cites·20 claims
- 4853US9236312B2Preventing EPI damage for cap nitride strip scheme in a Fin-shaped field effect transistor (FinFET) deviceGLOBALFOUNDRIES INC·Filed 2013·Granted Jan 12, 2016·0 cites·17 claims
- 4952US10896853B2Mask-free methods of forming structures in a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2019·Granted Jan 19, 2021·0 cites·19 claims
- 5052US2015061085A1Package interconnectsGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Application pending·0 cites
Showing the top 50 of 66 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →