Inventor · disambiguated record
Hung-Sui Lin
Also filed as: LIN HUNG-SUI
19 granted patents·8 pending applications·327 citations·filing 2001–2015
95Inventor score
Top patents by PatentIndex Score
27 records- 0194US6498377B1SONOS component having high dielectric propertyMACRONIX INT CO LTD·Filed 2002·Granted Dec 24, 2002·107 cites·18 claims
- 0292US6524913B1Method of fabricating a non-volatile memory with a spacerMACRONIX INT CO LTD·Filed 2001·Granted Feb 25, 2003·74 cites·20 claims
- 0382US6720614B2Operation method for programming and erasing a data in a P-channel sonos memory cellMACRONIX INT CO LTD·Filed 2001·Granted Apr 13, 2004·31 cites·12 claims
- 0482US6671209B2Erasing method for p-channel NROMMACRONIX INT CO LTD·Filed 2001·Granted Dec 30, 2003·28 cites·6 claims
- 0573US6455388B1Method of manufacturing metal-oxide semiconductor transistorMACRONIX INT CO LTD·Filed 2002·Granted Sep 24, 2002·16 cites·13 claims
- 0670US6620693B2Non-volatile memory and fabrication thereofMACRONIX INT CO LTD·Filed 2002·Granted Sep 16, 2003·10 cites·7 claims
- 0769US6635946B2Semiconductor device with trench isolation structureMACRONIX INT CO LTD·Filed 2001·Granted Oct 21, 2003·15 cites·20 claims
- 0860US6458643B1Method of fabricating a MOS device with an ultra-shallow junctionMACRONIX INT CO LTD·Filed 2001·Granted Oct 1, 2002·7 cites·15 claims
- 0959US6555844B1Semiconductor device with minimal short-channel effects and low bit-line resistanceMACRONIX INT CO LTD·Filed 2002·Granted Apr 29, 2003·7 cites·19 claims
- 1057US6448142B1Method for fabricating a metal oxide semiconductor transistorMACRONIX INT CO LTD·Filed 2001·Granted Sep 10, 2002·5 cites·10 claims
- 1156US9059192B2Metal-insulation-metal deviceLIN HUNG-SUI·Filed 2011·Granted Jun 16, 2015·2 cites·6 claims
- 1256US6524919B2Method for manufacturing a metal oxide semiconductor with a sharp corner spacerMACRONIX INT CO LTD·Filed 2001·Granted Feb 25, 2003·5 cites·19 claims
- 1355US6482709B1Manufacturing process of a MOS transistorMACRONIX INT CO LTD·Filed 2001·Granted Nov 19, 2002·6 cites·9 claims
- 1454US6812099B2Method for fabricating non-volatile memory having P-type floating gateMACRONIX INT CO LTD·Filed 2002·Granted Nov 2, 2004·6 cites·20 claims
- 1552US6808995B2Semiconductor device with minimal short-channel effects and low bit-line resistanceMACRONIX INT CO LTD·Filed 2003·Granted Oct 26, 2004·4 cites·11 claims
- 1650US6514807B1Method for fabricating semiconductor device applied system on chipMACRONIX INT CO LTD·Filed 2001·Granted Feb 4, 2003·4 cites·14 claims
- 1747US8045306B2Electrical-overstress protection circuit for an integrated circuitHIMAX TECH LTD·Filed 2010·Granted Oct 25, 2011·0 cites·7 claims
- 1845US2012008244A1Electrical-overstress protection circuit for an integrated circuitHUANG CHUNG-MING·Filed 2011·Application pending·0 cites
- 1940US9520353B2Metal-insulation-metal deviceHIMAX TECH LTD·Filed 2015·Granted Dec 13, 2016·0 cites·4 claims
- 2036US2003134477A1Memory structure and method for manufacturing the sameFiled 2002·Application pending·0 cites
- 2136US2003132488A1Non-volatile memory and fabrication thereofFiled 2002·Application pending·0 cites
- 2234US6492235B2Method for forming extension by using double etch spacerMACRONIX INT CO LTD·Filed 2001·Granted Dec 10, 2002·0 cites·15 claims
- 2334US2004196609A1Protection circuit scheme for electrostatic dischargeFiled 2003·Application pending·0 cites
- 2434US2002197780A1Method for forming a metal oxide semiconductor type field effect transistorMACRONIX INT CO LTD·Filed 2001·Application pending·0 cites
- 2534US2004105313A1Erasing method for p-channel NROMFiled 2003·Application pending·0 cites
- 2633US2002086473A1Process for fabricating CMOS transistor of IC devices employing double spacers for preventing short-channel effectsFiled 2001·Application pending·0 cites
- 2733US2002155686A1Fabrication method for suppressing a hot carrier effect and leakage currents of I/O devicesFiled 2001·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Hung-Sui Lin files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →