Inventor · disambiguated record
Ilie Garbacea
Also filed as: GARBACEA ILIE
17 granted patents·3 pending applications·313 citations·filing 2004–2020
94Inventor score
Top patents by PatentIndex Score
20 records- 0195US8145880B1Matrix processor data switch routing systems and methodsCISMAS SORIN C·Filed 2008·Granted Mar 27, 2012·67 cites·14 claims
- 0293US8126283B1Video encoding statistics extraction using non-exclusive content categoriesGARBACEA ILIE·Filed 2005·Granted Feb 28, 2012·29 cites·5 claims
- 0393US8094716B1Method and apparatus of adaptive lambda estimation in Lagrangian rate-distortion optimization for video codingCHEN LULIN·Filed 2005·Granted Jan 10, 2012·26 cites·20 claims
- 0492US7765547B2Hardware multithreading systems with state registers having thread profiling dataMAXIM INTEGRATED PRODUCTS·Filed 2004·Granted Jul 27, 2010·93 cites·91 claims
- 0591US7958341B1Processing stream instruction in IC of mesh connected matrix of processors containing pipeline coupled switch transferring messages over consecutive cycles from one link to another link or memoryOvics·Filed 2008·Granted Jun 7, 2011·31 cites·25 claims
- 0690US8149909B1Video encoding control using non-exclusive content categoriesGARBACEA ILIE·Filed 2005·Granted Apr 3, 2012·14 cites·10 claims
- 0789US8640129B2Hardware multithreading systems and methodsCISMAS SORIN C·Filed 2010·Granted Jan 28, 2014·14 cites·20 claims
- 0887US10535287B2Step-down pixel response correction systems and methodsAPPLE INC·Filed 2016·Granted Jan 14, 2020·4 cites·20 claims
- 0985US8327114B1Matrix processor proxy systems and methodsCISMAS SORIN C·Filed 2008·Granted Dec 4, 2012·14 cites·10 claims
- 1078US8131975B1Matrix processor initialization systems and methodsCISMAS SORIN C·Filed 2008·Granted Mar 6, 2012·9 cites·27 claims
- 1177US10410587B2Display pixel charge accumulation compensation systems and methodsAPPLE INC·Filed 2016·Granted Sep 10, 2019·2 cites·17 claims
- 1276US7870365B1Matrix of processors with data stream instruction execution pipeline coupled to data switch linking to neighbor units by non-contentious command channel / data channelOvics·Filed 2008·Granted Jan 11, 2011·8 cites·13 claims
- 1367US10706825B2Timestamp based display update mechanismAPPLE INC·Filed 2015·Granted Jul 7, 2020·1 cites·20 claims
- 1464US11211036B2Timestamp based display update mechanismAPPLE INC·Filed 2020·Granted Dec 28, 2021·0 cites·20 claims
- 1560US10534614B2Rescheduling threads using different cores in a multithreaded microprocessor having a shared register poolGARBACEA ILIE·Filed 2012·Granted Jan 14, 2020·1 cites·26 claims
- 1652US8831093B2Video encoding control using non-exclusive content categoriesGARBACEA ILIE·Filed 2012·Granted Sep 9, 2014·0 cites·15 claims
- 1750US9280513B1Matrix processor proxy systems and methodsOvics·Filed 2012·Granted Mar 8, 2016·0 cites·18 claims
- 1844US2014244987A1Precision Exception Signaling for Multiple Data ArchitectureMIPS TECH INC·Filed 2013·Application pending·0 cites
- 1944US2014244977A1Deferred Saving of Registers in a Shared Register Pool for a Multithreaded MicroprocessorMIPS TECH INC·Filed 2013·Application pending·0 cites
- 2041US2013159667A1Vector Size Agnostic Single Instruction Multiple Data (SIMD) Processor ArchitectureGARBACEA ILIE·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →