Inventor · disambiguated record
Inkuk Kang
Also filed as: KANG INKUK
22 granted patents·5 pending applications·245 citations·filing 2002–2024
95Inventor score
Files withCYPRESS SEMICONDUCTOR CORP9SPANSION LLC6ADVANCED MICRO DEVICES INC4FANG SHENQING4FASL LLC3
Top patents by PatentIndex Score
27 records- 0196US9853039B1Split-gate flash cell formed on recessed substrateCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Dec 26, 2017·16 cites·19 claims
- 0295US12029041B2Method of forming high-voltage transistor with thin gate polyCYPRESS SEMICONDUCTOR CORP·Filed 2023·Granted Jul 2, 2024·1 cites·20 claims
- 0392US7033957B1ONO fabrication process for increasing oxygen content at bottom oxide-substrate interface in flash memory devicesFASL LLC·Filed 2003·Granted Apr 25, 2006·62 cites·21 claims
- 0491US6803275B1ONO fabrication process for reducing oxygen vacancy content in bottom oxide layer in flash memory devicesFASL LLC·Filed 2002·Granted Oct 12, 2004·46 cites·19 claims
- 0588US10872898B2Embedded non-volatile memory device and fabrication method of the sameCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Dec 22, 2020·4 cites·25 claims
- 0685US6969886B1ONO fabrication process for reducing oxygen vacancy content in bottom oxide layer in flash memory devicesFASL LLC·Filed 2004·Granted Nov 29, 2005·28 cites·20 claims
- 0784US6963108B1Recessed channelADVANCED MICRO DEVICES INC·Filed 2003·Granted Nov 8, 2005·37 cites·35 claims
- 0877US10242996B2Method of forming high-voltage transistor with thin gate polyCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Mar 26, 2019·1 cites·20 claims
- 0974US11690227B2Method of forming high-voltage transistor with thin gate polyCYPRESS SEMICONDUCTOR CORP·Filed 2021·Granted Jun 27, 2023·0 cites·21 claims
- 1073US6974989B1Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processingSPANSION LLC·Filed 2004·Granted Dec 13, 2005·13 cites·20 claims
- 1170US7060564B1Memory device and method of simultaneous fabrication of core and periphery of sameADVANCED MICRO DEVICES INC·Filed 2003·Granted Jun 13, 2006·12 cites·18 claims
- 1267US8551858B2Self-aligned SI rich nitride charge trap layer isolation for charge trap flash memoryFANG SHENQING·Filed 2010·Granted Oct 8, 2013·2 cites·11 claims
- 1362US2019304990A1Method of Forming High-Voltage Transistor with Thin Gate PolyCYPRESS SEMICONDUCTOR CORP·Filed 2019·Application pending·0 cites
- 1461US8026169B2Cu annealing for improved data retention in flash memory devicesADVANCED MICRO DEVICES INC·Filed 2006·Granted Sep 27, 2011·2 cites·6 claims
- 1561US7288487B1Metal/oxide etch after polish to prevent bridging between adjacent features of a semiconductor structureADVANCED MICRO DEVICES INC·Filed 2004·Granted Oct 30, 2007·9 cites·18 claims
- 1661US2024206183A1High-voltage transistor with thin high-k metal gate and method of fabrication thereofCYPRESS SEMICONDUCTOR CORP·Filed 2024·Application pending·0 cites
- 1760US8987092B2Methods for fabricating memory cells having fin structures with semicircular top surfaces and rounded top corners and edgesKANG INKUK·Filed 2008·Granted Mar 24, 2015·3 cites·16 claims
- 1859US8487373B2SONOS memory cells having non-uniform tunnel oxide and methods for fabricating sameFANG SHENQING·Filed 2009·Granted Jul 16, 2013·1 cites·14 claims
- 1959US2021134811A1Embedded non-volatile memory device and fabrication method of the sameCYPRESS SEMICONDUCTOR CORP·Filed 2020·Application pending·0 cites
- 2058US8076199B2Method and device employing polysilicon scalingFANG SHENQING·Filed 2009·Granted Dec 13, 2011·1 cites·14 claims
- 2156US10497710B2Split-gate flash cell formed on recessed substrateCYPRESS SEMICONDUCTOR CORP·Filed 2017·Granted Dec 3, 2019·0 cites·21 claims
- 2255US7242102B2Bond pad structure for copper metallization having increased reliability and method for fabricating sameSPANSION LLC·Filed 2004·Granted Jul 10, 2007·6 cites·7 claims
- 2351US8742496B2Sonos memory cells having non-uniform tunnel oxide and methods for fabricating sameSPANSION LLC·Filed 2013·Granted Jun 3, 2014·0 cites·6 claims
- 2449US2014001537A1Self-aligned si rich nitride charge trap layer isolation for charge trap flash memorySPANSION LLC·Filed 2013·Application pending·0 cites
- 2548US8637918B2Method and device employing polysilicon scalingFANG SHENQING·Filed 2011·Granted Jan 28, 2014·0 cites·10 claims
- 2648US7122465B1Method for achieving increased control over interconnect line thickness across a wafer and between wafersSPANSION LLC·Filed 2004·Granted Oct 17, 2006·1 cites·20 claims
- 2744US2015255480A1Method to Improve Charge Trap Flash Memory Top Oxide QualitySPANSION LLC·Filed 2014·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →