Inventor · disambiguated record
Iu-Meng Tom Ho
Also filed as: HO IU-MENG T · HO IU-MENG TOM
9 granted patents·3 pending applications·231 citations·filing 2002–2023
89Inventor score
Top patents by PatentIndex Score
12 records- 0194US7436008B2Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit deviceSYNOPSYS INC·Filed 2007·Granted Oct 14, 2008·29 cites·8 claims
- 0294US6734472B2Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit deviceSYNPLICITY INC·Filed 2002·Granted May 11, 2004·77 cites·20 claims
- 0393US6809949B2Ferroelectric memorySYMETRIX CORP·Filed 2002·Granted Oct 26, 2004·85 cites·41 claims
- 0482US7217887B2Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit deviceSYNPLICITY INC·Filed 2004·Granted May 15, 2007·24 cites·10 claims
- 0569US7352619B2Electronic memory with binary storage elementsIOTA TECHNOLOGY INC·Filed 2005·Granted Apr 1, 2008·6 cites·20 claims
- 0667US7774186B2Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit deviceSYNOPSYS INC·Filed 2008·Granted Aug 10, 2010·2 cites·6 claims
- 0763US2025006239A1Depletion mode ferroelectric transistorsHO IU MENG TOM·Filed 2023·Application pending·0 cites
- 0855US11729989B2Depletion mode ferroelectric transistorsHO IU MENG TOM·Filed 2020·Granted Aug 15, 2023·0 cites·9 claims
- 0955US7212427B2Ferroelectric memorySYMETRIX CORP·Filed 2003·Granted May 1, 2007·8 cites·15 claims
- 1045US8692297B2Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit deviceHO IU-MENG TOM·Filed 2010·Granted Apr 8, 2014·0 cites·9 claims
- 1128US2006187700A1Single event effect (SEE) tolerant circuit design strategy for SOI type technologyIOTA TECHNOLOGY INC·Filed 2006·Application pending·0 cites
- 1227US2005174841A1Electronic memory with tri-level cell pairIOTA TECHNOLOGY INC·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →