Inventor · disambiguated record
J. Daniel Mis
Also filed as: MIS J DANIEL
11 granted patents·288 citations·filing 1991–2010
92Inventor score
Top patents by PatentIndex Score
11 records- 0194US7427557B2Methods of forming bumps using barrier layers as etch masksUNITIVE INT LTD·Filed 2005·Granted Sep 23, 2008·28 cites·15 claims
- 0293US6762122B2Methods of forming metallurgy structures for wire and solder bondingUNITIVIE INTERNAT LTD·Filed 2001·Granted Jul 13, 2004·131 cites·42 claims
- 0392US7358174B2Methods of forming solder bumps on exposed metal padsAMKOR TECHNOLOGY INC·Filed 2005·Granted Apr 15, 2008·29 cites·31 claims
- 0484US7834454B2Electronic structures including barrier layers defining lipsUNITIVE INT LTD·Filed 2008·Granted Nov 16, 2010·9 cites·21 claims
- 0581US7839000B2Solder structures including barrier layers with nickel and/or copperUNITIVE INT LTD·Filed 2009·Granted Nov 23, 2010·11 cites·18 claims
- 0680US7547623B2Methods of forming lead free solder bumpsUNITIVE INT LTD·Filed 2005·Granted Jun 16, 2009·11 cites·28 claims
- 0772US8487432B2Electronic structures including barrier layers and/or oxidation barriers defining lips and related methodsRINNE GLENN A·Filed 2010·Granted Jul 16, 2013·3 cites·18 claims
- 0872US7994043B1Lead free alloy bump structure and fabrication methodAMKOR TECHNOLOGY INC·Filed 2008·Granted Aug 9, 2011·5 cites·11 claims
- 0964US5171642AMultilayered intermetallic connection for semiconductor devicesIBM·Filed 1991·Granted Dec 15, 1992·33 cites·9 claims
- 1054US7665652B2Electronic devices including metallurgy structures for wire and solder bondingUNITIVE INT LTD·Filed 2004·Granted Feb 23, 2010·6 cites·38 claims
- 1153US5470781AMethod to reduce stress from trench structure on SOI waferIBM·Filed 1993·Granted Nov 28, 1995·22 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →