Inventor · disambiguated record
James D. Allan
Also filed as: ALLAN JAMES · ALLAN JAMES D
16 granted patents·2 pending applications·435 citations·filing 1979–2013
95Inventor score
Files withCYPRESS SEMICONDUCTOR CORP10INMOS CORP3ALLAN JAMES D2HOUSTON THOMAS K1INOVA MICROELECTRONICS CORP1
Top patents by PatentIndex Score
18 records- 0191US6005814ATest mode entrance through clocked addressesCYPRESS SEMICONDUCTOR CORP·Filed 1998·Granted Dec 21, 1999·91 cites·21 claims
- 0291US4581546ACMOS substrate bias generator having only P channel transistors in the charge pumpINMOS CORP·Filed 1983·Granted Apr 8, 1986·63 cites·21 claims
- 0389US7518916B2Method and apparatus to program both sides of a non-volatile static random access memoryCYPRESS SEMICONDUCTOR CORP·Filed 2006·Granted Apr 14, 2009·25 cites·3 claims
- 0488US7539054B2Method and apparatus to program and erase a non-volatile static random access memory from the bit linesCYPRESS SEMICONDUCTOR CORP·Filed 2006·Granted May 26, 2009·22 cites·2 claims
- 0587US7505303B2Method and apparatus to create an erase disturb on a non-volatile static random access memory cellCYPRESS SEMICONDUCTOR CORP·Filed 2006·Granted Mar 17, 2009·20 cites·3 claims
- 0686US5761148ASub-word line driver circuit for memory blocks of a semiconductor memory deviceCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Jun 2, 1998·77 cites·19 claims
- 0784US4698526ASource follower CMOS input bufferINMOS CORP·Filed 1985·Granted Oct 6, 1987·32 cites·20 claims
- 0880US8315096B2Method and apparatus to implement a reset function in a non-volatile static random access memoryALLAN JAMES D·Filed 2011·Granted Nov 20, 2012·8 cites·20 claims
- 0974US4656612ADram current control techniqueINMOS CORP·Filed 1984·Granted Apr 7, 1987·22 cites·14 claims
- 1064US6566952B1Operational amplifier with extended output voltage rangeCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted May 20, 2003·12 cites·22 claims
- 1160US4322824AStatic random access memory with merged bit linesTEXAS INSTRUMENTS INC·Filed 1979·Granted Mar 30, 1982·15 cites·17 claims
- 1257US6510483B1Circuit, architecture and method for reading an address counter and/or matching a bus width through one or more synchronous portsCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Jan 21, 2003·11 cites·22 claims
- 1354US6118727ASemiconductor memory with interdigitated array having bit line pairs accessible from either of two sides of the arrayCYPRESS SEMICONDUCTOR CORP·Filed 1998·Granted Sep 12, 2000·14 cites·12 claims
- 1453US6111800AParallel test for asynchronous memoryCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Aug 29, 2000·12 cites·9 claims
- 1550US2014142965A1Method and apparatus for connecting clinical systems with behavior support and trackingHOUSTON THOMAS K·Filed 2013·Application pending·0 cites
- 1644US5022011AApparatus and method for reducing the access time after a write operation in a static memory deviceINOVA MICROELECTRONICS CORP·Filed 1989·Granted Jun 4, 1991·9 cites·8 claims
- 1740US6324107B1Parallel test for asynchronous memoryCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Nov 27, 2001·2 cites·12 claims
- 1834US2008151654A1Method and apparatus to implement a reset function in a non-volatile static random access memoryALLAN JAMES D·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →