Inventor · disambiguated record
Jan Höntschel
Also filed as: HÖNTSCHEL JAN
5 granted patents·15 citations·filing 2016–2024
71Inventor score
Top patents by PatentIndex Score
5 records- 0194US9806170B1Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOIGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 31, 2017·12 cites·7 claims
- 0282US10522655B2Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dial raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOIGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 31, 2019·3 cites·7 claims
- 0362US11217678B2Differential SG/EG spacer integration with equivalent NFET/PFET spacer widths and dual raised source drain expitaxial silicon and triple-nitride spacer integration enabling high-voltage EG device on FDSOIGLOBALFOUNDRIES US INC·Filed 2019·Granted Jan 4, 2022·0 cites·20 claims
- 0461US12328926B1Structures for a field-effect transistor that include a spacer structureGLOBALFOUNDRIES US INC·Filed 2024·Granted Jun 10, 2025·0 cites·20 claims
- 0536US10386406B1Back gate tuning circuitsGLOBALFOUNDRIES INC·Filed 2018·Granted Aug 20, 2019·0 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when Jan Höntschel files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →