Inventor · disambiguated record
James K. Pickett
Also filed as: PICKETT JAMES K · PICKETT JAMES KYLE
52 granted patents·1 pending application·2,833 citations·filing 1987–2016
99Inventor score
Top patents by PatentIndex Score
53 records- 0196US6438664B1Microcode patch device and method for patching microcode using match registers and patch routinesADVANCED MICRO DEVICES INC·Filed 1999·Granted Aug 20, 2002·272 cites·38 claims
- 0294US6944744B2Apparatus and method for independently schedulable functional units with issue lock mechanism in a processorADVANCED MICRO DEVICES INC·Filed 2002·Granted Sep 13, 2005·108 cites·24 claims
- 0390US7089400B1Data speculation based on stack-relative addressing patternsADVANCED MICRO DEVICES INC·Filed 2003·Granted Aug 8, 2006·62 cites·75 claims
- 0490US6826704B1Microprocessor employing a performance throttling mechanism for power managementADVANCED MICRO DEVICES INC·Filed 2001·Granted Nov 30, 2004·64 cites·14 claims
- 0589US5764946ASuperscalar microprocessor employing a way prediction unit to predict the way of an instruction fetch address and to concurrently provide a branch prediction address corresponding to the fetch addressADVANCED MICRO DEVICES INC·Filed 1997·Granted Jun 9, 1998·164 cites·25 claims
- 0688US5968169ASuperscalar microprocessor stack structure for judging validity of predicted subroutine return addressesADVANCED MICRO DEVICES INC·Filed 1997·Granted Oct 19, 1999·137 cites·26 claims
- 0787US7028166B2System and method for linking speculative results of load operations to register valuesADVANCED MICRO DEVICES INC·Filed 2002·Granted Apr 11, 2006·47 cites·51 claims
- 0887US7024537B2Data speculation based on addressing patterns identifying dual-purpose registerADVANCED MICRO DEVICES INC·Filed 2003·Granted Apr 4, 2006·48 cites·48 claims
- 0987US6845442B1System and method of using speculative operand sources in order to speculatively bypass load-store operationsADVANCED MICRO DEVICES INC·Filed 2002·Granted Jan 18, 2005·49 cites·33 claims
- 1087US5752069ASuperscalar microprocessor employing away prediction structureADVANCED MICRO DEVICES INC·Filed 1995·Granted May 12, 1998·141 cites·19 claims
- 1186US6073230AInstruction fetch unit configured to provide sequential way prediction for sequential instruction fetchesADVANCED MICRO DEVICES INC·Filed 1997·Granted Jun 6, 2000·106 cites·19 claims
- 1286US5848433AWay prediction unit and a method for operating the sameADVANCED MICRO DEVICES INC·Filed 1997·Granted Dec 8, 1998·132 cites·18 claims
- 1385US5339395AInterface circuit for interfacing a peripheral device with a microprocessor operating in either a synchronous or an asynchronous modeDELCO ELECTRONICS CORP·Filed 1992·Granted Aug 16, 1994·143 cites·15 claims
- 1484US7836259B1Prefetch unit for use with a cache memory subsystem of a cache memory hierarchyADVANCED MICRO DEVICES INC·Filed 2004·Granted Nov 16, 2010·39 cites·12 claims
- 1582US6151662AData transaction typing for improved caching and prefetching characteristicsADVANCED MICRO DEVICES INC·Filed 1997·Granted Nov 21, 2000·100 cites·28 claims
- 1681US7133969B2System and method for handling exceptional instructions in a trace cache based processorADVANCED MICRO DEVICES INC·Filed 2003·Granted Nov 7, 2006·30 cites·30 claims
- 1781US6298424B1Computer system including priorities for memory operations and allowing a higher priority memory operation to interrupt a lower priority memory operationADVANCED MICRO DEVICES INC·Filed 2000·Granted Oct 2, 2001·29 cites·35 claims
- 1880US6202139B1Pipelined data cache with multiple ports and processor with load/store unit selecting only load or store operations for concurrent processingADVANCED MICRO DEVICES INC·Filed 1998·Granted Mar 13, 2001·44 cites·39 claims
- 1980US5832297ASuperscalar microprocessor load/store unit employing a unified buffer and separate pointers for load and store operationsADVANCED MICRO DEVICES INC·Filed 1997·Granted Nov 3, 1998·99 cites·27 claims
- 2079US10163508B2Supporting multiple memory types in a memory slotINTEL CORP·Filed 2016·Granted Dec 25, 2018·5 cites·29 claims
- 2179US6106573AApparatus and method for tracing microprocessor instructionsADVANCED MICRO DEVICES INC·Filed 1999·Granted Aug 22, 2000·75 cites·14 claims
- 2278US5926646AContext-dependent memory-mapped registers for transparent expansion of a register fileADVANCED MICRO DEVICES INC·Filed 1997·Granted Jul 20, 1999·79 cites·40 claims
- 2378US5892936ASpeculative register file for storing speculative register states and removing dependencies between instructions utilizing the registerADVANCED MICRO DEVICES INC·Filed 1997·Granted Apr 6, 1999·82 cites·28 claims
- 2477US6079006AStride-based data address prediction structureADVANCED MICRO DEVICES INC·Filed 1998·Granted Jun 20, 2000·65 cites·18 claims
- 2577US5933626AApparatus and method for tracing microprocessor instructionsADVANCED MICRO DEVICES INC·Filed 1997·Granted Aug 3, 1999·68 cites·12 claims
- 2676US7415597B2Processor with dependence mechanism to predict whether a load is dependent on older storeADVANCED MICRO DEVICES INC·Filed 2004·Granted Aug 19, 2008·21 cites·23 claims
- 2775US6101595AFetching instructions from an instruction cache using sequential way predictionADVANCED MICRO DEVICES INC·Filed 1999·Granted Aug 8, 2000·61 cites·20 claims
- 2874US7043626B1Retaining flag value associated with dead result data in freed rename physical register with an indicator to select set-aside register instead for renamingADVANCED MICRO DEVICES INC·Filed 2003·Granted May 9, 2006·20 cites·16 claims
- 2972US7222226B1System and method for modifying a load operation to include a register-to-register move operation in order to forward speculative load results to a dependent operationADVANCED MICRO DEVICES INC·Filed 2002·Granted May 22, 2007·17 cites·21 claims
- 3071US6076156AInstruction redefinition using model specific registersADVANCED MICRO DEVICES INC·Filed 1997·Granted Jun 13, 2000·56 cites·21 claims
- 3170US5761712AData memory unit and method for storing data into a lockable cache in one clock cycle by previewing the tag arrayADVANCED MICRO DEVICES INC·Filed 1997·Granted Jun 2, 1998·59 cites·25 claims
- 3269US5940876AStride instruction for fetching data separated by a stride amountADVANCED MICRO DEVICES INC·Filed 1997·Granted Aug 17, 1999·48 cites·14 claims
- 3367US7251710B1Cache memory subsystem including a fixed latency R/W pipelineADVANCED MICRO DEVICES INC·Filed 2004·Granted Jul 31, 2007·12 cites·26 claims
- 3467US6058461AComputer system including priorities for memory operations and allowing a higher priority memory operation to interrupt a lower priority memory operationADVANCED MICRO DEVICES INC·Filed 1997·Granted May 2, 2000·43 cites·17 claims
- 3567US5933618ASpeculative register storage for storing speculative results corresponding to register updated by a plurality of concurrently recorded instructionADVANCED MICRO DEVICES INC·Filed 1995·Granted Aug 3, 1999·54 cites·32 claims
- 3667US5845323AWay prediction structure for predicting the way of a cache in which an access hits, thereby speeding cache access timeADVANCED MICRO DEVICES INC·Filed 1997·Granted Dec 1, 1998·52 cites·16 claims
- 3766US6957322B1Efficient microcode entry access from sequentially addressed portion via non-sequentially addressed portionADVANCED MICRO DEVICES INC·Filed 2002·Granted Oct 18, 2005·11 cites·21 claims
- 3865US5854921AStride-based data address prediction structureADVANCED MICRO DEVICES INC·Filed 1995·Granted Dec 29, 1998·40 cites·8 claims
- 3962US7321964B2Store-to-load forwarding buffer using indexed lookupADVANCED MICRO DEVICES INC·Filed 2003·Granted Jan 22, 2008·8 cites·31 claims
- 4062US6957319B1Integrated circuit with multiple microcode ROMsADVANCED MICRO DEVICES INC·Filed 2003·Granted Oct 18, 2005·8 cites·25 claims
- 4161US5958045AStart of access instruction configured to indicate an access mode for fetching memory operands in a microprocessorADVANCED MICRO DEVICES INC·Filed 1997·Granted Sep 28, 1999·38 cites·18 claims
- 4258US7165167B2Load store unit with replay mechanismADVANCED MICRO DEVICES INC·Filed 2003·Granted Jan 16, 2007·6 cites·18 claims
- 4357US7363470B2System and method to prevent in-flight instances of operations from disrupting operation replay within a data-speculative microprocessorADVANCED MICRO DEVICES INC·Filed 2003·Granted Apr 22, 2008·5 cites·26 claims
- 4456US7266673B2Speculation pointers to identify data-speculative operations in microprocessorADVANCED MICRO DEVICES INC·Filed 2003·Granted Sep 4, 2007·4 cites·35 claims
- 4548US5893146ACache structure having a reduced tag comparison to enable data transfer from said cacheADVANCED MICRO DEVICES INC·Filed 1997·Granted Apr 6, 1999·21 cites·34 claims
- 4647US6175908B1Variable byte-length instructions using state of function bit of second byte of plurality of instructions bytes as indicative of whether first byte is a prefix byteADVANCED MICRO DEVICES INC·Filed 1998·Granted Jan 16, 2001·19 cites·38 claims
- 4745US5872943AApparatus for aligning instructions using predecoded shift amountsADVANCED MICRO DEVICES INC·Filed 1996·Granted Feb 16, 1999·17 cites·24 claims
- 4844US2004181626A1Partial linearly tagged cache memory systemFiled 2003·Application pending·0 cites
- 4943US4755696ACMOS binary threshold comparatorDELCO ELECTRONICS CORP·Filed 1987·Granted Jul 5, 1988·8 cites·10 claims
- 5038US6141745AFunctional bit identifying a prefix byte via a particular state regardless of type of instructionADVANCED MICRO DEVICES INC·Filed 1998·Granted Oct 31, 2000·9 cites·22 claims
Showing the top 50 of 53 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →