Inventor · disambiguated record
Jacek Rudzki
Also filed as: RUDZKI JACEK
13 granted patents·2 pending applications·11 citations·filing 2012–2024
85Inventor score
Top patents by PatentIndex Score
15 records- 0194US11400514B2Sintering tool and method for sintering an electronic subassemblyDANFOSS SILICON POWER GMBH·Filed 2020·Granted Aug 2, 2022·3 cites·14 claims
- 0272US10079219B2Power semiconductor contact structure and method for the production thereofDANFOSS SILICON POWER GMBH·Filed 2015·Granted Sep 18, 2018·2 cites·18 claims
- 0371US10483229B2Sintering deviceDANFOSS SILICON POWER GMBH·Filed 2015·Granted Nov 19, 2019·2 cites·20 claims
- 0470US10622331B2Method for producing a substrate arrangement, substrate arrangement, and method for connecting a substrate arrangement to an electronic componentHERAEUS DEUTSCHLAND GMBH & CO KG·Filed 2016·Granted Apr 14, 2020·2 cites·11 claims
- 0565US9613929B2Power semiconductor chip with a metallic moulded body for contacting thick wires or strips and method for the production thereofDANFOSS SILICON POWER GMBH·Filed 2016·Granted Apr 4, 2017·1 cites·7 claims
- 0658US9786627B2Method for creating a connection between metallic moulded bodies and a power semiconductor which is used to bond to thick wires or stripsBECKER MARTIN·Filed 2012·Granted Oct 10, 2017·1 cites·22 claims
- 0757US2024339387A1Semiconductor power moduleDANFOSS SILICON POWER GMBH·Filed 2024·Application pending·0 cites
- 0850US10814396B2Sintering tool and method for sintering an electronic subassemblyDANFOSS SILICON POWER GMBH·Filed 2015·Granted Oct 27, 2020·0 cites·15 claims
- 0949US12125817B2Semiconductor module with a first substrate, a second substrate and a spacer separating the substrates from each otherDANFOSS SILICON POWER GMBH·Filed 2020·Granted Oct 22, 2024·0 cites·24 claims
- 1048US9318421B2Power semiconductor chip with a metallic moulded body for contacting thick wires or strips and method for the production thereofBECKER MARTIN·Filed 2012·Granted Apr 19, 2016·0 cites·18 claims
- 1144US10607962B2Method for manufacturing semiconductor chipsDANFOSS SILICON POWER GMBH·Filed 2016·Granted Mar 31, 2020·0 cites·11 claims
- 1244US10332858B2Electronic sandwich structure with two parts joined together by means of a sintering layerDANFOSS SILICON POWER GMBH·Filed 2015·Granted Jun 25, 2019·0 cites·20 claims
- 1342US10818633B2Sintering tool for the lower die of a sintering deviceDANFOSS SILICON POWER GMBH·Filed 2015·Granted Oct 27, 2020·0 cites·18 claims
- 1442US10438924B2Method for cohesively connecting a first component of a power semiconductor module to a second component of a power semiconductor moduleDANFOSS SILICON POWER GMBH·Filed 2017·Granted Oct 8, 2019·0 cites·20 claims
- 1532US2017338193A1Power semiconductor module with short-circuit failure modeDANFOSS SILICON POWER GMBH·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →