Inventor · disambiguated record
Jayesh Wadekar
Also filed as: WADEKAR JAYESH · WADEKAR JAYESH GANGAPRASAD
6 granted patents·1 pending application·21 citations·filing 2010–2022
77Inventor score
Top patents by PatentIndex Score
7 records- 0190US10205445B1Clock duty cycle correction circuitSYNOPSYS INC·Filed 2018·Granted Feb 12, 2019·10 cites·19 claims
- 0288US11863170B1Unwanted peak reduction in equalizerSYNOPSYS INC·Filed 2022·Granted Jan 2, 2024·4 cites·20 claims
- 0370US10659214B2Multi-level clock and data recovery circuitSYNOPSYS INC·Filed 2017·Granted May 19, 2020·2 cites·20 claims
- 0468US10236843B2High gain differential amplifier with common-mode feedbackSYNOPSYS INC·Filed 2018·Granted Mar 19, 2019·2 cites·13 claims
- 0559US8138806B2Driver circuit for high voltage differential signalingWADEKAR JAYESH GANGAPRASAD·Filed 2010·Granted Mar 20, 2012·3 cites·21 claims
- 0654US2023042967A1Overlapped inductor structureSYNOPSYS INC·Filed 2022·Application pending·0 cites
- 0744US8649136B2Thin-oxide current clampSETH SUMANTRA·Filed 2011·Granted Feb 11, 2014·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →