Inventor · disambiguated record
Jean Barbier
Also filed as: BARBIER JEAN · BARBIER JEAN-MARC
19 granted patents·4 pending applications·744 citations·filing 1990–2009
96Inventor score
Top patents by PatentIndex Score
23 records- 0196US5754827AMethod and apparatus for performing fully visible tracing of an emulationMENTOR GRAPHICS CORP·Filed 1995·Granted May 19, 1998·146 cites·21 claims
- 0295US5777489AField programmable gate array with integrated debugging facilitiesMENTOR GRAPHICS CORP·Filed 1995·Granted Jul 7, 1998·103 cites·18 claims
- 0390US6057706AField programmable gate array with integrated debugging facilitiesMENTOR GRAPHICS CORP·Filed 1997·Granted May 2, 2000·47 cites·5 claims
- 0487US6388465B1Reconfigurable integrated circuit with integrated debussing facilities and scalable programmable interconnectFiled 2000·Granted May 14, 2002·24 cites·28 claims
- 0586US6934674B1Clock generation and distribution in an emulation systemMENTOR GRAPHICS CORP·Filed 1999·Granted Aug 23, 2005·59 cites·9 claims
- 0680US5999725AMethod and apparatus tracing any node of an emulationMENTOR GRAPHICS CORP·Filed 1998·Granted Dec 7, 1999·90 cites·10 claims
- 0780US5574388AEmulation system having a scalable multi-level multi-stage programmable interconnect networkMENTOR GRAPHICS CORP·Filed 1995·Granted Nov 12, 1996·93 cites·26 claims
- 0877US8003906B2Crossbar device constructed with MEMS switchesMETA SYSTEMS·Filed 2008·Granted Aug 23, 2011·9 cites·18 claims
- 0976US6717433B2Reconfigurable integrated circuit with integrated debugging facilities and scalable programmable interconnectFiled 2002·Granted Apr 6, 2004·12 cites·4 claims
- 1075US8072242B2Merged programmable output driverBARBIER JEAN·Filed 2009·Granted Dec 6, 2011·8 cites·19 claims
- 1169US5790832AMethod and apparatus for tracing any node of an emulationMENTOR GRAPHICS CORP·Filed 1996·Granted Aug 4, 1998·55 cites·20 claims
- 1267US8222920B2Dynamic phase alignmentBARBIER JEAN·Filed 2009·Granted Jul 17, 2012·3 cites·16 claims
- 1362US7098688B2Regionally time multiplexed emulation systemMENTOR GRAPHICS CORP·Filed 2003·Granted Aug 29, 2006·7 cites·6 claims
- 1460US5907697AEmulation system having a scalable multi-level multi-stage hybrid programmable interconnect networkMENTOR GRAPHICS CORP·Filed 1996·Granted May 25, 1999·38 cites·8 claims
- 1559US8072796B2Memory with five-transistor bit cells and associated control circuitBARBIER JEAN·Filed 2007·Granted Dec 6, 2011·4 cites·19 claims
- 1658US7307873B2Memory with five-transistor bit cells and associated control circuitM2000 SA·Filed 2006·Granted Dec 11, 2007·5 cites·22 claims
- 1748US6947882B1Regionally time multiplexed emulation systemMENTOR GRAPHICS CORP·Filed 1999·Granted Sep 20, 2005·17 cites·20 claims
- 1847US2010164471A1Calibration of programmable i/o components using a virtual variable external resistorM2000·Filed 2008·Application pending·0 cites
- 1946US2010040122A1Simultaneous bi-directional data transferM2000 SA·Filed 2008·Application pending·0 cites
- 2044US6647362B1Emulation system scalingFiled 1999·Granted Nov 11, 2003·16 cites·42 claims
- 2144US5124016AElectroplating apparatusELGA SA·Filed 1990·Granted Jun 23, 1992·8 cites·24 claims
- 2240US2010244921A1Programmable delay line circuit with glitch avoidanceM2000 SA·Filed 2009·Application pending·0 cites
- 2337US2004178820A1Reconfigurable integrated circuit with integrated debugging facilities and scalable programmable interconnectFiled 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →