Inventor · disambiguated record
Jeannette Sutherland
Also filed as: SUTHERLAND JEANNETTE N · SUTHERLAND JEANNETTE NEWMAN · Sutherland Jeannette
4 granted patents·5 pending applications·40 citations·filing 2003–2022
73Inventor score
Technology areasG06F
Top patents by PatentIndex Score
9 records- 0185US9405882B1High performance static timing analysis system and method for input/output interfacesCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Aug 2, 2016·6 cites·19 claims
- 0274US7206958B1Determining cycle adjustments for static timing analysis of multifrequency circuitsSUN MICROSYSTEMS INC·Filed 2003·Granted Apr 17, 2007·23 cites·39 claims
- 0362US7216316B1Method for evaluating nets in crosstalk noise analysisSUN MICROSYSTEMS INC·Filed 2004·Granted May 8, 2007·11 cites·17 claims
- 0453US2008059935A1Enhanced Routing Grid System And MethodPYXIS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 0553US2008072201A1Enhanced Routing Grid System And MethodPYXIS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 0653US2008184187A1Enhanced Routing Grid System and MethodPYXIS TECHNOLOGY INC·Filed 2008·Application pending·0 cites
- 0753US2008066044A1Enhanced Routing Grid System And MethodPYXIS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 0850US12475286B1System and method for comparing circuit design constraint setsCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Nov 18, 2025·0 cites·20 claims
- 0941US2005177357A1Static timing model for combinatorial gates having clock signal inputFiled 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →