Inventor · disambiguated record
Jeffrey Junhao Xu
Also filed as: XU JEFFREY · XU JEFFREY JUNHAO
66 granted patents·30 pending applications·1,088 citations·filing 2007–2024
99Inventor score
Files withQUALCOMM INC69TAIWAN SEMICONDUCTOR MFG9HUAWEI TECH CO LTD8TAIWAN SEMICONDUCTOR MFG CO LTD5UNIV KANSAS2
Top patents by PatentIndex Score
96 records- 0199US8853025B2FinFET/tri-gate channel doping for multiple threshold voltage tuningTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 7, 2014·507 cites·20 claims
- 0299US8703565B2Bottom-notched SiGe FinFET formation using condensationTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Apr 22, 2014·207 cites·19 claims
- 0397US9793164B2Self-aligned metal cut and via for back-end-of-line (BEOL) processes for semiconductor integrated circuit (IC) fabrication, and related processes and devicesQUALCOMM INC·Filed 2015·Granted Oct 17, 2017·23 cites·19 claims
- 0497US8395195B2Bottom-notched SiGe FinFET formation using condensationCHANG CHIH-HAO·Filed 2010·Granted Mar 12, 2013·59 cites·19 claims
- 0597US8338259B2Semiconductor device with a buried stressorWU ZHIQIANG·Filed 2010·Granted Dec 25, 2012·31 cites·6 claims
- 0696US9871121B2Semiconductor device having a gap defined thereinQUALCOMM INC·Filed 2014·Granted Jan 16, 2018·25 cites·16 claims
- 0795US9799560B2Self-aligned structureQUALCOMM INC·Filed 2015·Granted Oct 24, 2017·13 cites·40 claims
- 0894US10354912B2Forming self-aligned vertical interconnect accesses (VIAs) in interconnect structures for integrated circuits (ICs)QUALCOMM INC·Filed 2016·Granted Jul 16, 2019·12 cites·14 claims
- 0994US9576801B2High dielectric constant/metal gate (HK/MG) compatible floating gate (FG)/ferroelectric dipole non-volatile memoryQUALCOMM INC·Filed 2014·Granted Feb 21, 2017·17 cites·24 claims
- 1094US9257556B2Silicon germanium FinFET formation by Ge condensationQUALCOMM INC·Filed 2014·Granted Feb 9, 2016·19 cites·26 claims
- 1193US9620612B2Intergrated circuit devices including an interfacial dipole layerQUALCOMM INC·Filed 2015·Granted Apr 11, 2017·8 cites·12 claims
- 1293US9543248B2Integrated circuit devices and methodsQUALCOMM INC·Filed 2015·Granted Jan 10, 2017·8 cites·20 claims
- 1393US9299840B2FinFETs and methods for forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 29, 2016·10 cites·20 claims
- 1492US10439039B2Integrated circuits including a FinFET and a nanostructure FETQUALCOMM INC·Filed 2016·Granted Oct 8, 2019·8 cites·30 claims
- 1592US9953979B2Contact wrap around structureQUALCOMM INC·Filed 2015·Granted Apr 24, 2018·8 cites·14 claims
- 1691US9824936B2Adjacent device isolationQUALCOMM INC·Filed 2016·Granted Nov 21, 2017·6 cites·10 claims
- 1791US9343357B2Selective conductive barrier layer formationQUALCOMM INC·Filed 2014·Granted May 17, 2016·10 cites·16 claims
- 1890US10510872B2FinFETs and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 17, 2019·3 cites·20 claims
- 1988US9721891B2Integrated circuit devices and methodsQUALCOMM INC·Filed 2016·Granted Aug 1, 2017·3 cites·20 claims
- 2088US9240480B2Metal-oxide-semiconductor field-effect transistor with metal-insulator semiconductor contact structure to reduce Schottky barrierTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jan 19, 2016·7 cites·20 claims
- 2187US10062763B2Method and apparatus for selectively forming nitride caps on metal gateQUALCOMM INC·Filed 2015·Granted Aug 28, 2018·6 cites·21 claims
- 2287US9502414B2Adjacent device isolationQUALCOMM INC·Filed 2015·Granted Nov 22, 2016·4 cites·18 claims
- 2387US8927377B2Methods for forming FinFETs with self-aligned source/drainTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Jan 6, 2015·8 cites·20 claims
- 2487US8809171B2Methods for forming FinFETs having multiple threshold voltagesTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 19, 2014·9 cites·20 claims
- 2585US10283526B2Standard cell circuits employing voltage rails electrically coupled to metal shunts for reducing or avoiding increases in voltage dropQUALCOMM INC·Filed 2016·Granted May 7, 2019·5 cites·26 claims
- 2685US10115723B2Complementary metal oxide semiconductor (CMOS) devices employing plasma-doped source/drain structures and related methodsQUALCOMM INC·Filed 2017·Granted Oct 30, 2018·4 cites·21 claims
- 2784US10157992B2Nanowire device with reduced parasiticsQUALCOMM INC·Filed 2015·Granted Dec 18, 2018·3 cites·7 claims
- 2884US10043796B2Vertically stacked nanowire field effect transistorsQUALCOMM INC·Filed 2016·Granted Aug 7, 2018·4 cites·33 claims
- 2984US9985014B2Minimum track standard cell circuits for reduced areaQUALCOMM INC·Filed 2016·Granted May 29, 2018·4 cites·26 claims
- 3083US9922880B2Method and apparatus of multi threshold voltage CMOSQUALCOMM INC·Filed 2014·Granted Mar 20, 2018·4 cites·16 claims
- 3183US9508439B2Non-volatile multiple time programmable memory deviceQUALCOMM INC·Filed 2015·Granted Nov 29, 2016·4 cites·28 claims
- 3281US10964799B2FinFETs and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Mar 30, 2021·1 cites·19 claims
- 3381US10032678B2Nanowire channel structures of continuously stacked nanowires for complementary metal oxide semiconductor (CMOS) devicesQUALCOMM INC·Filed 2016·Granted Jul 24, 2018·3 cites·29 claims
- 3481US9653399B2Middle-of-line integration methods and semiconductor devicesQUALCOMM INC·Filed 2015·Granted May 16, 2017·3 cites·11 claims
- 3580US10504840B2Reducing tip-to-tip distance between end portions of metal lines formed in an interconnect layer of an integrated circuit (IC)QUALCOMM INC·Filed 2019·Granted Dec 10, 2019·2 cites·5 claims
- 3679US10497702B2Metal-oxide semiconductor (MOS) standard cells employing electrically coupled source regions and supply rails to relax source-drain tip-to-tip spacing between adjacent MOS standard cellsQUALCOMM INC·Filed 2017·Granted Dec 3, 2019·3 cites·26 claims
- 3779US10102898B2Ferroelectric-modulated Schottky non-volatile memoryQUALCOMM INC·Filed 2017·Granted Oct 16, 2018·2 cites·18 claims
- 3879US9219152B2Semiconductor device with a buried stressorTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Dec 22, 2015·4 cites·20 claims
- 3978US10374063B2FinFETs and methods for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 6, 2019·1 cites·20 claims
- 4078US10163792B2Semiconductor device having an airgap defined at least partially by a protective structureQUALCOMM INC·Filed 2014·Granted Dec 25, 2018·3 cites·30 claims
- 4178US9306066B2Method and apparatus of stressed FIN NMOS FinFETQUALCOMM INC·Filed 2014·Granted Apr 5, 2016·3 cites·25 claims
- 4278US7737554B2Pitch by splitting bottom metallization layerTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Jun 15, 2010·8 cites·20 claims
- 4374US10497625B2Method and apparatus of multi threshold voltage CMOSQUALCOMM INC·Filed 2018·Granted Dec 3, 2019·1 cites·6 claims
- 4474US2025046356A1Memory and access methodHUAWEI TECH CO LTD·Filed 2024·Application pending·0 cites
- 4573US10090244B2Standard cell circuits employing high aspect ratio voltage rails for reduced resistanceQUALCOMM INC·Filed 2017·Granted Oct 2, 2018·2 cites·26 claims
- 4673US7892929B2Shallow trench isolation corner roundingTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Feb 22, 2011·5 cites·20 claims
- 4772US10079293B2Semiconductor device having a gap defined thereinQUALCOMM INC·Filed 2017·Granted Sep 18, 2018·1 cites·23 claims
- 4872US9620454B2Middle-of-line (MOL) manufactured integrated circuits (ICs) employing local interconnects of metal lines using an elongated via, and related methodsQUALCOMM INC·Filed 2014·Granted Apr 11, 2017·2 cites·18 claims
- 4969US9876123B2Non-volatile one-time programmable memory deviceQUALCOMM INC·Filed 2014·Granted Jan 23, 2018·3 cites·33 claims
- 5069US9165929B2Complementarily strained FinFET structureQUALCOMM INC·Filed 2014·Granted Oct 20, 2015·2 cites·16 claims
Showing the top 50 of 96 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →