Methods for forming FinFETs with self-aligned source/drain

Abstract

A method includes forming a gate stack to cover a middle portion of a semiconductor fin, and doping an exposed portion of the semiconductor fin with an n-type impurity to form an n-type doped region. At least a portion of the middle portion is protected by the gate stack from receiving the n-type impurity. The method further includes etching the n-type doped region using chlorine radicals to form a recess, and performing an epitaxy to re-grow a semiconductor region in the recess.

What is claimed is: 
     
       1. A method comprising:
 forming a gate stack to cover a middle portion of a semiconductor fin; 
 doping an exposed portion of the semiconductor fin with an n-type impurity to form an n-type doped region, wherein a portion of the middle portion is protected by the gate stack from receiving the n-type impurity; 
 etching the n-type doped region using chlorine radicals to form a recess; and 
 performing an epitaxy to re-grow a semiconductor region in the recess. 
 
     
     
       2. The method of  claim 1 , wherein the step of doping is performed by implanting the n-type impurity into the exposed portion of the semiconductor fin. 
     
     
       3. The method of  claim 1 , wherein the n-type doped region has an edge aligned to an edge of the gate stack. 
     
     
       4. The method of  claim 1 , wherein the n-type doped region extends underlying, and is overlapped by, the gate stack. 
     
     
       5. The method of  claim 1 , wherein the step of etching is performed in an environment, with substantially no chlorine ions in the environment. 
     
     
       6. The method of  claim 1 , wherein the n-type doped region is doped to have an n-type impurity concentration higher than about 5×10 19 /cm 3 , and wherein the method further comprises performing a well doping into the semiconductor fin to a well doping concentration lower than about 1×10 18 /cm 3 . 
     
     
       7. The method of  claim 1 , wherein the step of doping the exposed portion of the semiconductor fin comprises implanting arsenic. 
     
     
       8. A method comprising:
 forming a gate stack to cover a middle portion of a semiconductor fin; 
 implanting end portions of the semiconductor fin with an n-type impurity to form n-type doped regions on opposite sides of the middle portion, wherein a portion of the middle portion of the semiconductor fin is free from receiving the n-type impurity; 
 etching the n-type doped regions using chlorine radicals to form a recess, wherein the etching step is stopped when the n-type doped regions are substantially fully removed, and the portion of the middle portion the semiconductor fin is substantially un-etched; and 
 performing an epitaxy to re-grow a semiconductor region in the recess, wherein the semiconductor region forms a source/drain region of a Fin Field-Effect Transistor (FinFET). 
 
     
     
       9. The method of  claim 8 , wherein during the step of etching the n-type doped regions, the chlorine radicals are non-uni-directional. 
     
     
       10. The method of  claim 8 , wherein the step of implanting comprises two tilt implantations tilted in opposite directions, and wherein during the two tilt implantations, the n-type impurity is implanted in directions parallel to planes of edges of the gate stack. 
     
     
       11. The method of  claim 8 , wherein the step of implanting comprises four tilt implantations tilted in opposite directions, and wherein during the four tilt implantations, the n-type impurity is implanted in directions un-parallel to planes of edges of the gate stack. 
     
     
       12. The method of  claim 8 , wherein the step of etching is performed in an environment, with substantially no chlorine ions in the environment. 
     
     
       13. The method of  claim 8 , wherein the step of etching is performed in an environment, with chlorine ions exist in the environment. 
     
     
       14. The method of  claim 8 , wherein the n-type doped regions are doped to have an n-type impurity concentration higher than about 5×10 19 /cm 3 . 
     
     
       15. A method comprising:
 forming a gate stack to cover a middle portion of a semiconductor fin, with the semiconductor fin being higher than top surfaces of shallow trench isolation regions on opposite sides of the semiconductor fin; 
 implanting an end portion of the semiconductor fin with an n-type impurity to form an n-type doped region, wherein a portion of the middle portion of the semiconductor fin under the gate stack is un-implanted, and forms an un-implanted region, and wherein the un-implanted region adjoins the n-type doped region; 
 etching the n-type doped region to form a recess, with chlorine radicals used to etch the n-type doped region, wherein the etching stops on the un-implanted region; and 
 performing an epitaxy to re-grow a semiconductor region starting from the un-implanted region, wherein the semiconductor region forms a source/drain region of a Fin Field-Effect Transistor (FinFET). 
 
     
     
       16. The method of  claim 15 , wherein the chlorine radicals are non-uni-directional. 
     
     
       17. The method of  claim 15  further comprising:
 generate a plasma from a chlorine comprising process gas; and 
 filtering the plasma to remove ions, wherein the chlorine radicals are left un-filtered. 
 
     
     
       18. The method of  claim 15 , wherein the un-implanted region is of n-type, and is doped to an n-type impurity concentration lower than about 1×10 18 /cm 3 . 
     
     
       19. The method of  claim 15 , wherein the step of implanting the end portion of the semiconductor fin comprises implanting arsenic. 
     
     
       20. The method of  claim 15 , wherein an interface between the n-type doped region and the un-implanted region is overlapped by the gate stack.