Inventor · disambiguated record
Jiehui Shu
Also filed as: SHU JIEHUI
83 granted patents·18 pending applications·211 citations·filing 2014–2021
98Inventor score
Top patents by PatentIndex Score
101 records- 0198US10236213B1Gate cut structure with liner spacer and related methodGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 19, 2019·25 cites·9 claims
- 0297US10217846B1Vertical field effect transistor formation with critical dimension controlGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 26, 2019·21 cites·11 claims
- 0395US10475791B1Transistor fins with different thickness gate dielectricGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 12, 2019·12 cites·13 claims
- 0495US10192780B1Self-aligned multiple patterning processes using bi-layer mandrels and cuts formed with block masksGLOBALFOUNDRIES INC·Filed 2018·Granted Jan 29, 2019·15 cites·20 claims
- 0594US9865681B1Nanowire transistors having multiple threshold voltagesGLOBALFOUNDRIES INC·Filed 2017·Granted Jan 9, 2018·12 cites·20 claims
- 0694US9711447B1Self-aligned lithographic patterning with variable spacingsGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 18, 2017·15 cites·20 claims
- 0793US9761452B1Devices and methods of forming SADP on SRAM and SAQP on logicGLOBALFOUNDRIES INC·Filed 2016·Granted Sep 12, 2017·7 cites·15 claims
- 0892US10002793B1Sub-fin doping methodGLOBALFOUNDRIES INC·Filed 2017·Granted Jun 19, 2018·8 cites·16 claims
- 0991US10586860B2Method of manufacturing finfet devices using narrow and wide gate cut openings in conjunction with a replacement metal gate processGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 10, 2020·6 cites·10 claims
- 1091US10573753B1Oxide spacer in a contact over active gate finFET and method of production thereofGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 25, 2020·6 cites·16 claims
- 1189US10811411B1Fin-type field effect transistor with reduced fin bulge and methodGLOBALFOUNDRIES INC·Filed 2019·Granted Oct 20, 2020·4 cites·20 claims
- 1289US10418272B1Methods, apparatus, and system for a semiconductor device comprising gates with short heightsGLOBALFOUNDRIES INC·Filed 2018·Granted Sep 17, 2019·4 cites·14 claims
- 1389US9984933B1Silicon liner for STI CMP stop in FinFETGLOBALFOUNDRIES INC·Filed 2017·Granted May 29, 2018·7 cites·20 claims
- 1488US10699957B2Late gate cut using selective dielectric depositionGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 30, 2020·4 cites·20 claims
- 1588US10692812B2Interconnects with variable space mandrel cuts formed by block patterningGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 23, 2020·4 cites·20 claims
- 1688US10347541B1Active gate contacts and method of fabrication thereofGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 9, 2019·6 cites·20 claims
- 1787US11482456B2Forming two portion spacer after metal gate and contact formation, and related IC structureGLOBALFOUNDRIES US INC·Filed 2019·Granted Oct 25, 2022·4 cites·15 claims
- 1887US10249496B2Narrowed feature formation during a double patterning processGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 2, 2019·7 cites·11 claims
- 1985US10340183B1Cobalt plated via integration schemeGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 2, 2019·4 cites·13 claims
- 2084US10685840B2Gate structuresGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 16, 2020·3 cites·20 claims
- 2183US10475693B1Method for forming single diffusion breaks between finFET devices and the resulting devicesGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 12, 2019·3 cites·20 claims
- 2282US10797046B1Resistor structure for integrated circuit, and related methodsGLOBALFOUNDRIES INC·Filed 2019·Granted Oct 6, 2020·3 cites·18 claims
- 2382US10340142B1Methods, apparatus and system for self-aligned metal hard masksGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 2, 2019·3 cites·17 claims
- 2481US10971583B2Gate cut isolation including air gap, integrated circuit including same and related methodGLOBALFOUNDRIES US INC·Filed 2018·Granted Apr 6, 2021·2 cites·9 claims
- 2579US10403742B2Field-effect transistors with fins formed by a damascene-like processGLOBALFOUNDRIES INC·Filed 2017·Granted Sep 3, 2019·2 cites·14 claims
- 2678US11522068B2IC product comprising an insulating gate separation structure positioned between end surfaces of adjacent gate structuresGLOBALFOUNDRIES US INC·Filed 2019·Granted Dec 6, 2022·2 cites·9 claims
- 2778US10777637B2Integrated circuit product with a multi-layer single diffusion break and methods of making such productsGLOBALFOUNDRIES INC·Filed 2019·Granted Sep 15, 2020·2 cites·19 claims
- 2878US10566202B1Gate structures of FinFET semiconductor devicesGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 18, 2020·2 cites·20 claims
- 2978US10446395B1Self-aligned multiple patterning processes with layered mandrelsGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 15, 2019·2 cites·17 claims
- 3077US10431500B1Multi-step insulator formation in trenches to avoid seams in insulatorsGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 1, 2019·2 cites·19 claims
- 3177US9704746B1Advanced self-aligned patterning process with sit spacer as a final dielectric etch hardmaskGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 11, 2017·3 cites·20 claims
- 3277US9275898B1Method to improve selectivity cobalt cap processGLOBALFOUNDRIES INC·Filed 2015·Granted Mar 1, 2016·3 cites·20 claims
- 3376US10453936B2Methods of forming replacement gate structures on transistor devicesGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 22, 2019·2 cites·20 claims
- 3472US11171237B2Middle of line gate structuresGLOBALFOUNDRIES US INC·Filed 2019·Granted Nov 9, 2021·1 cites·19 claims
- 3571US10840245B1Semiconductor device with reduced parasitic capacitanceGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 17, 2020·1 cites·20 claims
- 3671US10784195B2Electrical fuse formation during a multiple patterning processGLOBALFOUNDRIES INC·Filed 2018·Granted Sep 22, 2020·1 cites·17 claims
- 3769US11563085B2Transistors with separately-formed source and drainGLOBALFOUNDRIES US INC·Filed 2021·Granted Jan 24, 2023·0 cites·20 claims
- 3869US10629707B2FinFET structure with bulbous upper insulative cap portion to protect gate height, and related methodGLOBALFOUNDRIES INC·Filed 2018·Granted Apr 21, 2020·1 cites·18 claims
- 3968US11610965B2Gate cut isolation including air gap, integrated circuit including same and related methodGLOBALFOUNDRIES US INC·Filed 2021·Granted Mar 21, 2023·0 cites·15 claims
- 4068US10714422B2Anti-fuse with self aligned via patterningGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 14, 2020·1 cites·18 claims
- 4168US10522538B1Using source/drain contact cap during gate cutGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 31, 2019·1 cites·19 claims
- 4267US11908917B2Gate structuresGLOBALFOUNDRIES US INC·Filed 2021·Granted Feb 20, 2024·0 cites·18 claims
- 4361US11348870B2Electrical fuse formation during a multiple patterning processGLOBALFOUNDRIES US INC·Filed 2020·Granted May 31, 2022·0 cites·20 claims
- 4461US11264382B2Fin-type field effect transistor with reduced fin bulge and methodGLOBALFOUNDRIES US INC·Filed 2020·Granted Mar 1, 2022·0 cites·20 claims
- 4561US11127834B2Gate structuresGLOBALFOUNDRIES US INC·Filed 2019·Granted Sep 21, 2021·0 cites·20 claims
- 4659US11075268B2Transistors with separately-formed source and drainGLOBALFOUNDRIES US INC·Filed 2019·Granted Jul 27, 2021·0 cites·10 claims
- 4759US10964599B2Multi-step insulator formation in trenches to avoid seams in insulatorsGLOBALFOUNDRIES US INC·Filed 2019·Granted Mar 30, 2021·0 cites·18 claims
- 4858US11121023B2FinFET device comprising a single diffusion break with an upper surface that is substantially coplanar with an upper surface of a finGLOBALFOUNDRIES US INC·Filed 2019·Granted Sep 14, 2021·0 cites·12 claims
- 4956US2019273148A1Field-effect transistors with fins formed by a damascene-like processGLOBALFOUNDRIES INC·Filed 2019·Application pending·0 cites
- 5056US2019355615A1Methods, apparatus, and system for a semiconductor device comprising gates with short heightsGLOBALFOUNDRIES INC·Filed 2019·Application pending·0 cites
Showing the top 50 of 101 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →