Inventor · disambiguated record
John G. Favor
Also filed as: FAVOR JOHN G · FAVOR JOHN GREGORY
183 granted patents·1 pending application·6,365 citations·filing 1990–2024
99Inventor score
Files withVENTANA MICRO SYSTEMS INC66ADVANCED MICRO DEVICES INC36ORACLE AMERICA INC28SUN MICROSYSTEMS INC13AMPERE COMPUTING LLC6
Top patents by PatentIndex Score
184 records- 0198US7797512B1Virtual core managementORACLE AMERICA INC·Filed 2007·Granted Sep 14, 2010·85 cites·15 claims
- 0298US7443759B1Reduced-power memory with per-sector ground controlSUN MICROSYSTEMS INC·Filed 2007·Granted Oct 28, 2008·77 cites·26 claims
- 0398US7389403B1Adaptive computing ensemble microprocessor architectureSUN MICROSYSTEMS INC·Filed 2006·Granted Jun 17, 2008·155 cites·24 claims
- 0498US6499123B1Method and apparatus for debugging an integrated circuitADVANCED MICRO DEVICES INC·Filed 2000·Granted Dec 24, 2002·221 cites·5 claims
- 0598US5226126AProcessor having plurality of functional units for orderly retiring outstanding operations based upon its associated tagsNEXGEN MICROSYSTEMS·Filed 1990·Granted Jul 6, 1993·449 cites·8 claims
- 0697US11836498B1Single cycle predictorVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Dec 5, 2023·7 cites·25 claims
- 0797US11816489B1Microprocessor with prediction unit pipeline that provides a next fetch address at a rate of one per clock cycleVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Nov 14, 2023·7 cites·21 claims
- 0897US11687466B1Translation lookaside buffer consistency directory for use with virtually-indexed virtually-tagged first level data cache that holds page table permissionsVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Jun 27, 2023·8 cites·29 claims
- 0997US8370609B1Data cache rollbacks for failed speculative traces with memory operationsORACLE AMERICA INC·Filed 2008·Granted Feb 5, 2013·77 cites·8 claims
- 1097US7802073B1Virtual core managementORACLE AMERICA INC·Filed 2007·Granted Sep 21, 2010·132 cites·18 claims
- 1197US7681019B1Executing functions determined via a collection of operations from translated instructionsSUN MICROSYSTEMS INC·Filed 2006·Granted Mar 16, 2010·70 cites·44 claims
- 1297US7533242B1Prefetch hardware efficiency via prefetch hint instructionsSUN MICROSYSTEMS INC·Filed 2006·Granted May 12, 2009·131 cites·22 claims
- 1396US11868263B2Using physical address proxies to handle synonyms when writing store data to a virtually-indexed cacheVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Jan 9, 2024·4 cites·21 claims
- 1496US11841802B2Microprocessor that prevents same address load-load ordering violationsVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Dec 12, 2023·4 cites·31 claims
- 1596US11755731B2Processor that prevents speculative execution across translation context change boundaries to mitigate side channel attacksVENTANA MICRO SYSTEMS INC·Filed 2020·Granted Sep 12, 2023·6 cites·33 claims
- 1696US11481332B1Write combining using physical address proxies stored in a write combine bufferVENTANA MICRO SYSTEMS INC·Filed 2021·Granted Oct 25, 2022·5 cites·23 claims
- 1796US10348281B1Clock control based on voltage associated with a microprocessorAMPERE COMPUTING LLC·Filed 2016·Granted Jul 9, 2019·20 cites·15 claims
- 1896US8024522B1Memory ordering queue/versioning cache circuitORACLE AMERICA INC·Filed 2008·Granted Sep 20, 2011·66 cites·7 claims
- 1996US7870369B1Abort prioritization in a trace-based processorORACLE AMERICA INC·Filed 2007·Granted Jan 11, 2011·82 cites·9 claims
- 2096US5226130AMethod and apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistencyNEXGEN MICROSYSTEMS·Filed 1990·Granted Jul 6, 1993·300 cites·4 claims
- 2195US12079126B2Unforwardable load instruction re-execution eligibility based on cache update by identified store instructionVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Sep 3, 2024·3 cites·21 claims
- 2295US8850121B1Outstanding load miss buffer with shared entriesASHCRAFT MATTHEW W·Filed 2011·Granted Sep 30, 2014·37 cites·20 claims
- 2395US8543843B1Virtual core managementCHENG YU QING·Filed 2007·Granted Sep 24, 2013·69 cites·20 claims
- 2495US6453278B1Flexible implementation of a system management mode (SMM) in a processorADVANCED MICRO DEVICES INC·Filed 2000·Granted Sep 17, 2002·112 cites·32 claims
- 2595US5920515ARegister-based redundancy circuit and method for built-in self-repair in a semiconductor memory deviceADVANCED MICRO DEVICES INC·Filed 1997·Granted Jul 6, 1999·145 cites·22 claims
- 2694US7788473B1Prediction of data values read from memory by a microprocessor using the storage destination of a load operationORACLE AMERICA INC·Filed 2006·Granted Aug 31, 2010·47 cites·21 claims
- 2793US12079129B2Using physical address proxies to accomplish penalty-less processing of load/store instructions whose data straddles cache line address boundariesVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Sep 3, 2024·2 cites·40 claims
- 2893US12073220B2Store-to-load forwarding correctness checks at store instruction commitVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Aug 27, 2024·2 cites·29 claims
- 2993US8225315B1Virtual core managementCHENG YU QING·Filed 2007·Granted Jul 17, 2012·27 cites·9 claims
- 3093US7797517B1Trace optimization via fusing operations of a target architecture operation setORACLE AMERICA INC·Filed 2006·Granted Sep 14, 2010·33 cites·16 claims
- 3193US7673122B1Software hint to specify the preferred branch prediction to use for a branch instructionSUN MICROSYSTEMS INC·Filed 2005·Granted Mar 2, 2010·36 cites·44 claims
- 3293US6298438B1System and method for conditional moving an operand from a source register to destination registerADVANCED MICRO DEVICES INC·Filed 1999·Granted Oct 2, 2001·172 cites·22 claims
- 3393US5442757AComputer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interruptsNEXGEN INC·Filed 1993·Granted Aug 15, 1995·147 cites·56 claims
- 3493US5163140ATwo-level branch prediction cacheNEXGEN MICROSYSTEMS·Filed 1992·Granted Nov 10, 1992·145 cites·3 claims
- 3592US8037285B1Trace unitORACLE AMERICA INC·Filed 2007·Granted Oct 11, 2011·36 cites·2 claims
- 3692US7877630B1Trace based rollback of a speculatively updated cacheORACLE AMERICA INC·Filed 2008·Granted Jan 25, 2011·29 cites·5 claims
- 3792US7568089B1Flag management in processors enabled for speculative execution of micro-operation tracesSUN MICROSYSTEMS INC·Filed 2006·Granted Jul 28, 2009·25 cites·19 claims
- 3892US6093213AFlexible implementation of a system management mode (SMM) in a processorADVANCED MICRO DEVICES INC·Filed 1996·Granted Jul 25, 2000·168 cites·33 claims
- 3991US11860794B2Generational physical address proxiesVENTANA MICRO SYSTEMS INC·Filed 2022·Granted Jan 2, 2024·2 cites·23 claims
- 4091US7856548B1Prediction of data values read from memory by a microprocessor using a dynamic confidence thresholdORACLE AMERICA INC·Filed 2006·Granted Dec 21, 2010·30 cites·28 claims
- 4190US9058284B1Method and apparatus for performing table lookupBEN-MEIR AMOS·Filed 2012·Granted Jun 16, 2015·24 cites·24 claims
- 4290US8281308B1Virtual core remapping based on temperatureCHENG YU QING·Filed 2007·Granted Oct 2, 2012·19 cites·14 claims
- 4390US7953933B1Instruction cache, decoder circuit, basic block cache circuit and multi-block cache circuitORACLE AMERICA INC·Filed 2007·Granted May 31, 2011·24 cites·3 claims
- 4490US7949854B1Trace unit with a trace builderORACLE AMERICA INC·Filed 2007·Granted May 24, 2011·25 cites·8 claims
- 4590US7941607B1Method and system for promoting traces in an instruction processing circuitORACLE AMERICA INC·Filed 2007·Granted May 10, 2011·17 cites·21 claims
- 4690US7814298B1Promoting and appending traces in an instruction processing circuit based upon a bias valueORACLE AMERICA INC·Filed 2007·Granted Oct 12, 2010·22 cites·15 claims
- 4790US5781753ASemi-autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for speculative and out-of-order execution of complex instructionsADVANCED MICRO DEVICES INC·Filed 1995·Granted Jul 14, 1998·134 cites·61 claims
- 4890US5230068ACache memory system for dynamically altering single cache memory line as either branch target entry or pre-fetch instruction queue based upon instruction sequenceNEXGEN MICROSYSTEMS·Filed 1990·Granted Jul 20, 1993·139 cites·5 claims
- 4989US8499293B1Symbolic renaming optimization of a traceASHCRAFT MATTHEW WILLIAM·Filed 2007·Granted Jul 30, 2013·33 cites·8 claims
- 5089US6336178B1RISC86 instruction setADVANCED MICRO DEVICES INC·Filed 1998·Granted Jan 1, 2002·131 cites·48 claims
Showing the top 50 of 184 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →