Inventor · disambiguated record
John Macpherson
Also filed as: MACPHERSON JOHN · MACPHERSON JOHN W · MACPHERSON JOHN W JR · MACPHERSON JOHN WALLACE
20 granted patents·7 pending applications·918 citations·filing 1988–2012
96Inventor score
Top patents by PatentIndex Score
27 records- 0196US5885749AMethod of customizing integrated circuits by selective secondary deposition of layer interconnect materialCLEAR LOGIC INC·Filed 1997·Granted Mar 23, 1999·296 cites·9 claims
- 0292US6749748B1Methods for reducing the amount of contaminants in waterVANSON HALOSOURCE INC·Filed 2001·Granted Jun 15, 2004·53 cites·33 claims
- 0389US5017394AMethod for making edible base shapes having pictorial images for decorating foodstuffsLUCKS CO·Filed 1988·Granted May 21, 1991·127 cites·9 claims
- 0488US5223154ASystem for filtering liquids in a catch basin using filters in series and overflow channelsEMCON NORTHWEST INC·Filed 1991·Granted Jun 29, 1993·137 cites·33 claims
- 0585US6821427B2Methods for reducing the amount of contaminants in waterVANSON HALOSOURCE INC·Filed 2004·Granted Nov 23, 2004·30 cites·40 claims
- 0677US6311316B1Designing integrated circuit gate arrays using programmable logic device bitstreamsCLEAR LOGIC INC·Filed 1998·Granted Oct 30, 2001·72 cites·20 claims
- 0764US6348742B1Sacrificial bond pads for laser configured integrated circuitsCLEAR LOGIC INC·Filed 1999·Granted Feb 19, 2002·31 cites·13 claims
- 0864US6078091AInter-conductive layer fuse for integrated circuitsCLEAR LOGIC INC·Filed 1998·Granted Jun 20, 2000·26 cites·7 claims
- 0956US6486527B1Vertical fuse structure for integrated circuits containing an exposure window in the layer over the fuse structure to facilitate programming thereafterFiled 1999·Granted Nov 26, 2002·27 cites·42 claims
- 1055US6020648ADie structure using microspheres as a stress buffer for integrated circuit prototypesCLEAR LOGIC INC·Filed 1998·Granted Feb 1, 2000·17 cites·9 claims
- 1154US5945238AMethod of making a reusable photolithography maskCLEAR LOGIC INC·Filed 1998·Granted Aug 31, 1999·15 cites·26 claims
- 1250US6096566AInter-conductive layer fuse for integrated circuitsCLEAR LOGIC INC·Filed 1998·Granted Aug 1, 2000·14 cites·18 claims
- 1350US6060330AMethod of customizing integrated circuits by selective secondary deposition of interconnect materialCLEAR LOGIC INC·Filed 1997·Granted May 9, 2000·17 cites·31 claims
- 1450US2013180924A1Systems and methods for treating wastewaterMACPHERSON JR JOHN W·Filed 2012·Application pending·0 cites
- 1546US5985518AMethod of customizing integrated circuits using standard masks and targeting energy beamsCLEAR LOGIC INC·Filed 1997·Granted Nov 16, 1999·14 cites·11 claims
- 1646US2011198298A1Floating capillary filter and methodMACPHERSON JR JOHN W·Filed 2010·Application pending·0 cites
- 1743US7749391B2Coagulant-enhanced pre-filtration systemNATURAL SITE SOLUTIONS LLC·Filed 2006·Granted Jul 6, 2010·0 cites·11 claims
- 1843US6369437B1Vertical fuse structure for integrated circuits and a method of disconnecting the sameCLEAR LOGIC INC·Filed 1999·Granted Apr 9, 2002·10 cites·10 claims
- 1943US6087200AUsing microspheres as a stress buffer for integrated circuit prototypesCLEAR LOGIC INC·Filed 1998·Granted Jul 11, 2000·9 cites·9 claims
- 2043US5989783AMethod of customizing integrated circuits by depositing two resist layers to selectively pattern layer interconnect materialCLEAR LOGIC INC·Filed 1998·Granted Nov 23, 1999·9 cites·15 claims
- 2141US2003200520A1Methods and systems for designing integrated circuit gate arraysFiled 2001·Application pending·0 cites
- 2238US2007007213A1Water filtration process and apparatusMACPHERSON JOHN W JR·Filed 2006·Application pending·0 cites
- 2337US6239480B1Modified lead frame for improved parallelism of a die to packageCLEAR LOGIC INC·Filed 1998·Granted May 29, 2001·7 cites·12 claims
- 2437US6235556B1Method of improving parallelism of a die to package using a modified lead frameCLEAR LOGIC INC·Filed 1998·Granted May 22, 2001·7 cites·10 claims
- 2537US2002100958A1Vertical fuse structure for integrated circuits and a method of disconnecting the sameCLEAR LOGIC INC·Filed 2002·Application pending·0 cites
- 2633US2001000210A1Method of improving parallelism of a die to package using a modified lead frameFiled 2000·Application pending·0 cites
- 2733US2001023118A1Customization of an integrated circuit in packaged formFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →