Inventor · disambiguated record
John G. Meyers
Also filed as: MEYERS JOHN · MEYERS JOHN G · MEYERS JOHN GARY
18 granted patents·5 pending applications·90 citations·filing 2002–2021
92Inventor score
Top patents by PatentIndex Score
23 records- 0194US10910347B2Method, apparatus and system to interconnect packaged integrated circuit diesINTEL CORP·Filed 2019·Granted Feb 2, 2021·10 cites·22 claims
- 0294US9871007B2Packaged integrated circuit device with cantilever structureINTEL CORP·Filed 2015·Granted Jan 16, 2018·20 cites·9 claims
- 0390US9441660B2Mounting insert and methodMEYERS JOHN·Filed 2015·Granted Sep 13, 2016·12 cites·13 claims
- 0481US11145632B2High density die package configuration on system boardsINTEL CORP·Filed 2017·Granted Oct 12, 2021·3 cites·20 claims
- 0575US10396055B2Method, apparatus and system to interconnect packaged integrated circuit diesINTEL CORP·Filed 2015·Granted Aug 27, 2019·2 cites·24 claims
- 0675US7533457B2Packaging method for circuit boardINTEL CORP·Filed 2005·Granted May 19, 2009·7 cites·18 claims
- 0773US7498201B2Method of forming a multi-die semiconductor packageINTEL CORP·Filed 2005·Granted Mar 3, 2009·5 cites·20 claims
- 0870US6927497B2Multi-die semiconductor packageINTEL CORP·Filed 2002·Granted Aug 9, 2005·14 cites·18 claims
- 0969US12068283B2Die stack with cascade and vertical connectionsINTEL CORP·Filed 2021·Granted Aug 20, 2024·0 cites·15 claims
- 1068US7503155B2Method for packaging a tape substrateMEYERS JOHN G·Filed 2002·Granted Mar 17, 2009·16 cites·17 claims
- 1165US11552051B2Electronic device packageINTEL CORP·Filed 2017·Granted Jan 10, 2023·1 cites·21 claims
- 1250US11171114B2Die stack with cascade and vertical connectionsINTEL CORP·Filed 2015·Granted Nov 9, 2021·0 cites·7 claims
- 1350US10490516B2Packaged integrated circuit device with cantilever structureINTEL CORP·Filed 2018·Granted Nov 26, 2019·0 cites·5 claims
- 1447US2009133247A1Apparatus for packaging a tape substrateMEYERS JOHN G·Filed 2009·Application pending·0 cites
- 1546US11817438B2System in package with interconnected modulesINTEL CORP·Filed 2019·Granted Nov 14, 2023·0 cites·20 claims
- 1645US10964682B2Data storage system using wafer-level packagingINTEL CORP·Filed 2016·Granted Mar 30, 2021·0 cites·19 claims
- 1737US2019006331A1Electronics package devices with through-substrate-vias having pitches independent of substrate thicknessINTEL CORP·Filed 2017·Application pending·0 cites
- 1836US2017179987A1Embedded port in wearable mobile electronic deviceINTEL CORP·Filed 2015·Application pending·0 cites
- 1936US2019326249A1Multi-point stacked die wirebonding for improved power deliveryINTEL CORP·Filed 2016·Application pending·0 cites
- 2036US2018096946A1Semiconductor packages having a fiducial marker and methods for aligning tools relative to the fiducial markerINTEL CORP·Filed 2016·Application pending·0 cites
- 2135US11901274B2Packaged integrated circuit device with recess structureINTEL CORP·Filed 2015·Granted Feb 13, 2024·0 cites·20 claims
- 2235US11335640B2Microelectronic structures having notched microelectronic substratesINTEL CORP·Filed 2016·Granted May 17, 2022·0 cites·14 claims
- 2333US10872832B2Pre-molded active IC of passive components to miniaturize system in packageINTEL CORP·Filed 2015·Granted Dec 22, 2020·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →