Inventor · disambiguated record
John Pasternak
Also filed as: PASTERNAK JOHN · PASTERNAK JOHN H · PASTERNAK JOHN HENRY
15 granted patents·1 pending application·963 citations·filing 1993–2020
95Inventor score
Top patents by PatentIndex Score
16 records- 0197US6522585B2Dual-cell soft programming for virtual-ground memory arraysSANDISK CORP·Filed 2001·Granted Feb 18, 2003·199 cites·30 claims
- 0296US5912560ACharge pump circuit for voltage boosting in integrated semiconductor circuitsWAFERSCALE INTEGRATION INC·Filed 1997·Granted Jun 15, 1999·169 cites·11 claims
- 0395US7391193B2Voltage regulator with bypass modeSANDISK CORP·Filed 2005·Granted Jun 24, 2008·54 cites·33 claims
- 0495US6856551B2System and method for programming cells in non-volatile integrated memory devicesSANDISK CORP·Filed 2003·Granted Feb 15, 2005·89 cites·23 claims
- 0595US6577535B2Method and system for distributed power generation in multi-chip memory systemsSANDISK CORP·Filed 2001·Granted Jun 10, 2003·114 cites·34 claims
- 0692US7212067B2Voltage regulator with bypass for multi-voltage storage systemSANDISK CORP·Filed 2003·Granted May 1, 2007·84 cites·36 claims
- 0792US5568085AUnit for stabilizing voltage on a capacitive nodeWAFERSCALE INTEGRATION INC·Filed 1994·Granted Oct 22, 1996·71 cites·5 claims
- 0890US7164561B2Voltage regulator using protected low voltage devicesSANDISK CORP·Filed 2004·Granted Jan 16, 2007·46 cites·45 claims
- 0990US5402014APeripheral port with volatile and non-volatile configurationWAFERSCALE INTEGRATION INC·Filed 1993·Granted Mar 28, 1995·60 cites·10 claims
- 1083US9432003B2Multi-bit standard cells for consolidating transistors with selective sourcingSYNOPSYS INC·Filed 2014·Granted Aug 30, 2016·6 cites·18 claims
- 1181US5394450ACircuit for performing arithmetic operationsWAFERSCALE INTEGRATION INC·Filed 1993·Granted Feb 28, 1995·47 cites·19 claims
- 1263US8904336B1Determination of meta-stable latch bias voltagesSYNOPSYS INC·Filed 2013·Granted Dec 2, 2014·1 cites·24 claims
- 1352US6115272ADuty cycle based charge pump controllerWAFERSCALE INTEGRATION INC·Filed 1998·Granted Sep 5, 2000·18 cites·10 claims
- 1441US11159163B2Single phase clock-gating circuitSYNOPSYS INC·Filed 2020·Granted Oct 26, 2021·0 cites·12 claims
- 1538US2005117400A1System and method for programming cells in non-volatile integrated memory devicesFiled 2005·Application pending·0 cites
- 1637US5801457AUnit for maintaining information regarding the state of a device during battery powerWAFERSCALE INTEGRATION INC·Filed 1996·Granted Sep 1, 1998·5 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →