Inventor · disambiguated record
Joseph Michael Swenton
Also filed as: SWENTON JOSEPH · SWENTON JOSEPH M · SWENTON JOSEPH MICHAEL
18 granted patents·93 citations·filing 2000–2022
93Inventor score
Files withCADENCE DESIGN SYSTEMS INC14BARTENSTEIN THOMAS WEBSTER1CADENCE DESIGN SYSTEM INC1CHAKRAVARTHY SAMEER H1SWENTON JOSEPH1
Top patents by PatentIndex Score
18 records- 0193US9400311B1Method and system of collective failure diagnosis for multiple electronic circuitsCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Jul 26, 2016·13 cites·16 claims
- 0292US9864004B1System and method for diagnosing failure locations in electronic circuitsCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jan 9, 2018·8 cites·20 claims
- 0390US11740284B1Diagnosing multicycle faults and/or defects with single cycle ATPG test patternsCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Aug 29, 2023·3 cites·20 claims
- 0489US11892501B1Diagnosing multicycle transition faults and/or defects with AT-speed ATPG test patternsCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Feb 6, 2024·3 cites·20 claims
- 0589US11429776B1Fault rules files for testing an IC chipCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Aug 30, 2022·3 cites·17 claims
- 0688US11435401B1Timed transition cell-aware ATPG using fault rule files and SDF for testing an IC chipCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Sep 6, 2022·2 cites·20 claims
- 0787US11579194B1Utilizing single cycle ATPG test patterns to detect multicycle cell-aware defectsCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Feb 14, 2023·2 cites·20 claims
- 0881US8813004B1Analog fault visualization system and method for circuit designsCADENCE DESIGN SYSTEMS INC·Filed 2012·Granted Aug 19, 2014·7 cites·20 claims
- 0981US7496816B2Isolating the location of defects in scan chainsCADENCE DESIGN SYSTEM INC·Filed 2006·Granted Feb 24, 2009·13 cites·26 claims
- 1080US10060976B1Method and apparatus for automatic diagnosis of mis-comparesCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Aug 28, 2018·3 cites·13 claims
- 1177US10338137B1Highly accurate defect identification and prioritization of fault locationsCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jul 2, 2019·2 cites·18 claims
- 1272US6708306B2Method for diagnosing failures using invariant analysisCADENCE DESIGN SYSTEMS INC·Filed 2000·Granted Mar 16, 2004·18 cites·13 claims
- 1369US8402421B2Method and system for subnet defect diagnostics through fault compositingBARTENSTEIN THOMAS WEBSTER·Filed 2010·Granted Mar 19, 2013·4 cites·21 claims
- 1467US8190953B2Method and system for selecting test vectors in statistical volume diagnosis using failed test dataCHAKRAVARTHY SAMEER H·Filed 2008·Granted May 29, 2012·8 cites·30 claims
- 1560US7821276B2Method and article of manufacture to generate IC test vector for synchronized physical probingCADENCE DESIGN SYSTEMS INC·Filed 2008·Granted Oct 26, 2010·3 cites·9 claims
- 1655US8120378B2System to control insertion of care-bits in an IC test vector improved optical probingSWENTON JOSEPH·Filed 2010·Granted Feb 21, 2012·1 cites·6 claims
- 1752US11893336B1Utilizing transition ATPG test patterns to detect multicycle faults and/or defects in an IC chipCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Feb 6, 2024·0 cites·20 claims
- 1839US10180457B1System and method performing scan chain diagnosis of an electronic designCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jan 15, 2019·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →