Inventor · disambiguated record
Juergen Pille
Also filed as: PILLE JUERGEN
60 granted patents·6 pending applications·367 citations·filing 1998–2020
98Inventor score
Top patents by PatentIndex Score
66 records- 0193US10901651B2Memory block erasureIBM·Filed 2020·Granted Jan 26, 2021·4 cites·20 claims
- 0288US9589604B1Single ended bitline current sense amplifier for SRAM applicationsIBM·Filed 2015·Granted Mar 7, 2017·11 cites·21 claims
- 0388US7813163B2Single-ended read and differential write schemeIBM·Filed 2008·Granted Oct 12, 2010·20 cites·11 claims
- 0488US6537861B1SOI transistor with body contact and method of forming sameIBM·Filed 1999·Granted Mar 25, 2003·95 cites·7 claims
- 0586US7710796B2Level shifter for boosting wordline voltage and memory cell performanceIBM·Filed 2007·Granted May 4, 2010·19 cites·18 claims
- 0685US7808856B2Method to reduce leakage of a SRAM-arrayIBM·Filed 2008·Granted Oct 5, 2010·16 cites·5 claims
- 0784US8493812B2Boost circuit for generating an adjustable boost voltageDENGLER OSAMA·Filed 2010·Granted Jul 23, 2013·13 cites·12 claims
- 0883US10585619B1Memory block erasureIBM·Filed 2018·Granted Mar 10, 2020·5 cites·20 claims
- 0983US6785781B2Read/write alignment scheme for port reduction of multi-port SRAM cellsIBM·Filed 2001·Granted Aug 31, 2004·36 cites·13 claims
- 1082US9761286B2Current-mode sense amplifierIBM·Filed 2016·Granted Sep 12, 2017·4 cites·18 claims
- 1181US10586006B2Build synthesized soft arraysIBM·Filed 2019·Granted Mar 10, 2020·3 cites·20 claims
- 1280US10833089B2Buried conductive layer supplying digital circuitsIBM·Filed 2018·Granted Nov 10, 2020·3 cites·18 claims
- 1376US10204674B2Activation of memory core circuits in an integrated circuitIBM·Filed 2017·Granted Feb 12, 2019·3 cites·1 claims
- 1475US11164879B2Microelectronic device with a memory element utilizing stacked vertical devicesIBM·Filed 2018·Granted Nov 2, 2021·2 cites·23 claims
- 1573US10096346B2Current-mode sense amplifierIBM·Filed 2017·Granted Oct 9, 2018·2 cites·20 claims
- 1673US6668341B1Storage cell with integrated soft error detection and correctionIBM·Filed 2000·Granted Dec 23, 2003·22 cites·12 claims
- 1771US7636254B2Wordline booster circuit and method of operating a wordline booster circuitIBM·Filed 2007·Granted Dec 22, 2009·6 cites·15 claims
- 1870US7936198B2Progamable control clock circuit for arraysIBM·Filed 2008·Granted May 3, 2011·4 cites·16 claims
- 1968US7336115B2Redundancy in signal distribution treesIBM·Filed 2006·Granted Feb 26, 2008·3 cites·6 claims
- 2067US9098659B2Advanced array local clock buffer base block circuitIBM·Filed 2014·Granted Aug 4, 2015·2 cites·7 claims
- 2167US7755408B2Redundancy in signal distribution treesIBM·Filed 2007·Granted Jul 13, 2010·4 cites·12 claims
- 2267US7626851B2Method to improve performance of SRAM cells, SRAM cell, SRAM array, and write circuitIBM·Filed 2007·Granted Dec 1, 2009·6 cites·2 claims
- 2367US7289370B2Methods and apparatus for accessing memoryIBM·Filed 2005·Granted Oct 30, 2007·6 cites·16 claims
- 2467US6725332B2Hierarchical priority filter with integrated serialization for determining the entry with the highest priority in a buffer memoryIBM·Filed 2001·Granted Apr 20, 2004·13 cites·15 claims
- 2566US7844871B2Test interface for memory elementsIBM·Filed 2008·Granted Nov 30, 2010·6 cites·1 claims
- 2664US10210923B2Activation of memory core circuits in an integrated circuitIBM·Filed 2017·Granted Feb 19, 2019·1 cites·18 claims
- 2763US7844799B2Method and system for pipeline reductionIBM·Filed 2001·Granted Nov 30, 2010·10 cites·16 claims
- 2862US9401698B1Transforming a phase-locked-loop generated chip clock signal to a local clock signalIBM·Filed 2015·Granted Jul 26, 2016·1 cites·17 claims
- 2960US6341093B1SOI array sense and write margin qualificationIBM·Filed 2001·Granted Jan 22, 2002·11 cites·13 claims
- 3058US7401312B2Automatic method for routing and designing an LSIIBM·Filed 2004·Granted Jul 15, 2008·5 cites·7 claims
- 3157US9704567B1Stressing and testing semiconductor memory cellsIBM·Filed 2016·Granted Jul 11, 2017·1 cites·17 claims
- 3256US7675794B2Design structure for improving performance of SRAM cells, SRAM cell, SRAM array, and write circuitIBM·Filed 2007·Granted Mar 9, 2010·3 cites·3 claims
- 3354US11209479B2Stressing integrated circuits using a radiation sourceIBM·Filed 2019·Granted Dec 28, 2021·0 cites·20 claims
- 3454US7295481B2Power saving by disabling cyclic bitline prechargeIBM·Filed 2004·Granted Nov 13, 2007·9 cites·5 claims
- 3553US7921388B2Wordline booster design structure and method of operating a wordine booster circuitIBM·Filed 2007·Granted Apr 5, 2011·2 cites·10 claims
- 3652US10529388B2Current-mode sense amplifierIBM·Filed 2018·Granted Jan 7, 2020·0 cites·18 claims
- 3752US8237481B2Low power programmable clock delay generator with integrated decode functionCHAN YUEN H·Filed 2008·Granted Aug 7, 2012·2 cites·5 claims
- 3852US7760541B2Functional float mode screen to test for leakage defects on SRAM bitlinesIBM·Filed 2008·Granted Jul 20, 2010·2 cites·8 claims
- 3951US11328110B2Integrated circuit including logic circuitryIBM·Filed 2020·Granted May 10, 2022·0 cites·15 claims
- 4051US10318688B2Build synthesized soft arraysIBM·Filed 2017·Granted Jun 11, 2019·0 cites·20 claims
- 4151US2008301616A1Layout Generator for Routing and Designing an LSIIBM·Filed 2008·Application pending·0 cites
- 4249US10804266B2Microelectronic device utilizing stacked vertical devicesIBM·Filed 2018·Granted Oct 13, 2020·0 cites·24 claims
- 4349US2019228811A1Activation of memory core circuits in an integrated circuitIBM·Filed 2019·Application pending·0 cites
- 4448US10388357B2Activation of memory core circuits in an integrated circuitIBM·Filed 2017·Granted Aug 20, 2019·0 cites·6 claims
- 4548US7194399B2Automatic check for cyclic operating conditions for SOI circuit simulationIBM·Filed 2001·Granted Mar 20, 2007·1 cites·8 claims
- 4647US9552851B2Current-mode sense amplifierIBM·Filed 2015·Granted Jan 24, 2017·0 cites·14 claims
- 4746US2006136854A1Method for placement of pipeline latchesIBM·Filed 2004·Application pending·0 cites
- 4845US9837142B1Automated stressing and testing of semiconductor memory cellsIBM·Filed 2016·Granted Dec 5, 2017·0 cites·9 claims
- 4945US9805823B1Automated stressing and testing of semiconductor memory cellsIBM·Filed 2017·Granted Oct 31, 2017·0 cites·8 claims
- 5043US11302378B2Semiconductor circuit including an initialization circuit for initializing memory cells and clearing of relatively large blocks of memoryIBM·Filed 2020·Granted Apr 12, 2022·0 cites·11 claims
Showing the top 50 of 66 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →