Activation of memory core circuits in an integrated circuit

Abstract

In an approach to activating at least one memory core circuit of a plurality of memory core circuits in an integrated circuit, one or more computer processors activate a clock signal of a currently selected memory core circuit. The one or more computer processors activate the clock signal of a previously selected memory core circuit to allow the previously selected memory core circuit to be set to a deselected operating mode. The one or more computer processors forward an output bit generated by a memory core circuit selected from a plurality of memory core circuits to a multiplexed bit line.

What is claimed is: 
     
         1 . A method for activating at least one memory core circuit of a plurality of memory core circuits in an integrated circuit, the method comprising:
 storing, by one or more computer processors, in a storage element, information regarding whether a specific memory core circuit was previously selected;   activating, by the one or more computer processors, a clock signal of a currently selected memory core circuit;   activating, by the one or more computer processors, the clock signal of a previously selected memory core circuit to allow the previously selected memory core circuit to be set to a deselected operating mode;   combining, by the one or more computer processors, an output bit generated by the currently selected memory core circuit with an output bit generated by the previously selected memory core circuit;   forwarding, by the one or more computer processors, the combined output bit to a multiplexed bit line; and   maintaining, by the one or more computer processors, an activated state of the clock signal of the specific memory core circuit based on the information stored in the storage element indicating that the specific memory core was previously activated.