Inventor · disambiguated record
Kaiping Liu
Also filed as: LIU KAIPING
31 granted patents·7 pending applications·748 citations·filing 2002–2017
97Inventor score
Top patents by PatentIndex Score
38 records- 0198US6743684B2Method to produce localized halo for MOS transistorTEXAS INSTRUMENTS INC·Filed 2002·Granted Jun 1, 2004·192 cites·3 claims
- 0297US7064039B2Method to produce localized halo for MOS transistorTEXAS INSTRUMENTS INC·Filed 2004·Granted Jun 20, 2006·153 cites·14 claims
- 0397US6660605B1Method to fabricate optimal HDD with dual diffusion process to optimize transistor drive current junction capacitance, tunneling current and channel dopant lossTEXAS INSTRUMENTS INC·Filed 2002·Granted Dec 9, 2003·159 cites·18 claims
- 0496US7038258B2Semiconductor device having a localized halo implant therein and method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2004·Granted May 2, 2006·99 cites·11 claims
- 0592US10276648B1Plasma treatment for thin film resistors on integrated circuitsTEXAS INSTRUMENTS INC·Filed 2017·Granted Apr 30, 2019·7 cites·20 claims
- 0692US7611943B2Transistors, integrated circuits, systems, and processes of manufacture with improved work function modulationTEXAS INSTRUMENTS INC·Filed 2005·Granted Nov 3, 2009·25 cites·17 claims
- 0791US9455312B2Multiple depth vias in an integrated circuitTEXAS INSTRUMENTS INC·Filed 2015·Granted Sep 27, 2016·6 cites·16 claims
- 0879US8779550B2Analog floating-gate capacitor with improved data retention in a silicided integrated circuitLIU KAIPING·Filed 2012·Granted Jul 15, 2014·6 cites·8 claims
- 0978US9496327B2High precision capacitor dielectricTEXAS INSTRUMENTS INC·Filed 2016·Granted Nov 15, 2016·2 cites·6 claims
- 1078US7691714B2Semiconductor device having a dislocation loop located within a boundary created by source/drain regions and a method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2005·Granted Apr 6, 2010·6 cites·14 claims
- 1177US7088123B1System and method for extraction of C-V characteristics of ultra-thin oxidesTEXAS INSTRUMENTS INC·Filed 2005·Granted Aug 8, 2006·10 cites·20 claims
- 1277US6913980B2Process method of source drain spacer engineering to improve transistor capacitanceTEXAS INSTRUMENTS INC·Filed 2003·Granted Jul 5, 2005·18 cites·32 claims
- 1377US6713360B2System for reducing segregation and diffusion of halo implants into highly doped regionsTEXAS INSTRUMENTS INC·Filed 2002·Granted Mar 30, 2004·19 cites·2 claims
- 1474US9202912B2Low cost demos transistor with improved CHC immunityTEXAS INSTRUMENTS INC·Filed 2014·Granted Dec 1, 2015·2 cites·17 claims
- 1569US8729616B2Low leakage capacitor for analog floating-gate integrated circuitsTEXAS INSTRUMENTS INC·Filed 2012·Granted May 20, 2014·2 cites·7 claims
- 1667US6940137B2Semiconductor device having an angled compensation implant and method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2003·Granted Sep 6, 2005·10 cites·27 claims
- 1766US8980723B2Multiple depth vias in an integrated circuitTEXAS INSTRUMENTS INC·Filed 2013·Granted Mar 17, 2015·1 cites·7 claims
- 1866US6677208B2Transistor with bottomwall/sidewall junction capacitance reduction region and methodTEXAS INSTRUMENTS INC·Filed 2002·Granted Jan 13, 2004·10 cites·8 claims
- 1960US7029967B2Silicide method for CMOS integrated circuitsTEXAS INSTRUMENTS INC·Filed 2004·Granted Apr 18, 2006·7 cites·12 claims
- 2057US9281213B2High precision capacitor dielectricTEXAS INSTRUMENTS INC·Filed 2014·Granted Mar 8, 2016·0 cites·13 claims
- 2156US8558296B2Low leakage capacitor for analog floating-gate integrated circuitsKHAN IMRAN MAHMOOD·Filed 2011·Granted Oct 15, 2013·1 cites·13 claims
- 2254US7118979B2Method of manufacturing transistor having germanium implant region on the sidewalls of the polysilicon gate electrodeTEXAS INSTRUMENTS INC·Filed 2003·Granted Oct 10, 2006·5 cites·12 claims
- 2353US9230887B2Multiple depth vias in an integrated circuitTEXAS INSTRUMENTS INC·Filed 2015·Granted Jan 5, 2016·0 cites·3 claims
- 2453US2008210976A1Semiconductor Device Having an Implanted Precipitate Region and a Method of Manufacture ThereforTEXAS INSTRUMENTS INC·Filed 2008·Application pending·0 cites
- 2552US6727131B2System and method for addressing junction capacitances in semiconductor devicesTEXAS INSTRUMENTS INC·Filed 2002·Granted Apr 27, 2004·3 cites·17 claims
- 2651US9577094B2Low cost demos transistor with improved CHC immunityTEXAS INSTRUMENTS INC·Filed 2015·Granted Feb 21, 2017·0 cites·14 claims
- 2751US8975135B2Analog floating-gate capacitor with improved data retention in a silicided integrated circuitTEXAS INSTRUMENTS INC·Filed 2014·Granted Mar 10, 2015·0 cites·13 claims
- 2851US7361570B1Semiconductor device having an implanted precipitate region and a method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2003·Granted Apr 22, 2008·2 cites·13 claims
- 2951US6794235B1Method of manufacturing a semiconductor device having a localized halo implantTEXAS INSTRUMENTS INC·Filed 2003·Granted Sep 21, 2004·2 cites·9 claims
- 3048US2010022062A1Transitor having a germanium implant region located therein and a method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2009·Application pending·0 cites
- 3147US2005212041A1Novel process method of source drain spacer engineering to improve transistor capacitanceWU ZHIQIANG·Filed 2005·Application pending·0 cites
- 3246US7129582B2Reducing the migration of grain boundariesTEXAS INSTRUMENTS INC·Filed 2005·Granted Oct 31, 2006·0 cites·9 claims
- 3346US2006216882A1Using Oxynitride Spacer to Reduce Parasitic Capacitance in CMOS DevicesTEXAS INSTRUMENTS INC·Filed 2006·Application pending·0 cites
- 3443US6955980B2Reducing the migration of grain boundariesTEXAS INSTRUMENTS INC·Filed 2002·Granted Oct 18, 2005·1 cites·11 claims
- 3543US2007004158A1Transistor having a germanium implant region located therein and a method of manufacture thereforTEXAS INSTRUMENTS INC·Filed 2006·Application pending·0 cites
- 3640US7667275B2Using oxynitride spacer to reduce parasitic capacitance in CMOS devicesTEXAS INSTRUMENTS INC·Filed 2004·Granted Feb 23, 2010·0 cites·2 claims
- 3739US2004079992A1Transistor with bottomwall/sidewall junction capacitance reduction region and methodFiled 2003·Application pending·0 cites
- 3833US2016218062A1Thin film resistor integration in copper damascene metallizationTEXAS INSTRUMENTS INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →