Inventor · disambiguated record
Kevin D. Kissell
Also filed as: KISSELL KEVIN D · KISSELL KEVIN DOUGLAS
46 granted patents·2 pending applications·1,239 citations·filing 2000–2023
99Inventor score
Top patents by PatentIndex Score
48 records- 0197US7676660B2System, method, and computer program product for conditionally suspending issuing instructions of a threadMIPS TECH INC·Filed 2007·Granted Mar 9, 2010·41 cites·25 claims
- 0297US7321965B2Integrated mechanism for suspension and deallocation of computational threads of execution in a processorMIPS TECH INC·Filed 2004·Granted Jan 22, 2008·100 cites·82 claims
- 0395US9542350B1Authenticating shared interconnect fabricsGOOGLE INC·Filed 2013·Granted Jan 10, 2017·27 cites·34 claims
- 0495US7418585B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Aug 26, 2008·30 cites·44 claims
- 0594US7725697B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted May 25, 2010·25 cites·39 claims
- 0694US7617388B2Virtual instruction expansion using parameter selector defining logic operation on parameters for template opcode substitutionMIPS TECH INC·Filed 2006·Granted Nov 10, 2009·32 cites·22 claims
- 0794US7424599B2Apparatus, method, and instruction for software management of multiple computational contexts in a multithreaded microprocessorMIPS TECH INC·Filed 2004·Granted Sep 9, 2008·63 cites·57 claims
- 0893US8266620B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsKISSELL KEVIN D·Filed 2010·Granted Sep 11, 2012·20 cites·12 claims
- 0993US7849297B2Software emulation of directed exceptions in a multithreading processorMIPS TECH INC·Filed 2005·Granted Dec 7, 2010·33 cites·68 claims
- 1093US7676664B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Mar 9, 2010·22 cites·45 claims
- 1192US7730291B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Jun 1, 2010·21 cites·49 claims
- 1292US7694304B2Mechanisms for dynamic configuration of virtual processor resourcesMIPS TECH INC·Filed 2004·Granted Apr 6, 2010·50 cites·58 claims
- 1392US7610473B2Apparatus, method, and instruction for initiation of concurrent instruction streams in a multithreading microprocessorMIPS TECH INC·Filed 2004·Granted Oct 27, 2009·48 cites·47 claims
- 1492US7376954B2Mechanisms for assuring quality of service for programs executing on a multithreaded processorMIPS TECH INC·Filed 2003·Granted May 20, 2008·77 cites·37 claims
- 1592US6976178B1Method and apparatus for disassociating power consumed within a processing system with instructions it is executingMIPS TECH INC·Filed 2001·Granted Dec 13, 2005·64 cites·12 claims
- 1692US6625737B1System for prediction and control of power consumption in digital systemMIPS TECH INC·Filed 2000·Granted Sep 23, 2003·65 cites·40 claims
- 1790US7836450B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Nov 16, 2010·20 cites·6 claims
- 1890US7747989B1Virtual machine coprocessor facilitating dynamic compilationMIPS TECH INC·Filed 2003·Granted Jun 29, 2010·44 cites·15 claims
- 1988US7725689B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted May 25, 2010·13 cites·45 claims
- 2087US7870553B2Symmetric multiprocessor operating system for execution on non-independent lightweight thread contextsMIPS TECH INC·Filed 2006·Granted Jan 11, 2011·18 cites·33 claims
- 2187US7003630B1Mechanism for proxy management of multiprocessor storage hierarchiesMIPS TECH INC·Filed 2002·Granted Feb 21, 2006·49 cites·36 claims
- 2285US10055237B2Virtual machine coprocessor for accelerating software executionARM FINANCE OVERSEAS LTD·Filed 2015·Granted Aug 21, 2018·3 cites·21 claims
- 2385US7620832B2Method and apparatus for masking a microprocessor execution signatureMIPS TECH INC·Filed 2005·Granted Nov 17, 2009·14 cites·26 claims
- 2485US6643759B2Mechanism to extend computer memory protection schemesMIPS TECH INC·Filed 2001·Granted Nov 4, 2003·54 cites·36 claims
- 2585US6523104B2Mechanism for programmable modification of memory mapping granularityMIPS TECH INC·Filed 2001·Granted Feb 18, 2003·40 cites·37 claims
- 2684US7613904B2Interfacing external thread prioritizing policy enforcing logic with customer modifiable register to processor internal schedulerMIPS TECH INC·Filed 2005·Granted Nov 3, 2009·14 cites·91 claims
- 2784US6651156B1Mechanism for extending properties of virtual memory pages by a TLBMIPS TECH INC·Filed 2001·Granted Nov 18, 2003·40 cites·19 claims
- 2883US7162621B2Virtual instruction expansion based on template and parameter selector information specifying sign-extension or concentrationMIPS TECH INC·Filed 2001·Granted Jan 9, 2007·27 cites·22 claims
- 2981US9032404B2Preemptive multitasking employing software emulation of directed exceptions in a multithreading processorKISSELL KEVIN D·Filed 2005·Granted May 12, 2015·11 cites·40 claims
- 3081US8145884B2Apparatus, method and instruction for initiation of concurrent instruction streams in a multithreading microprocessorKISSELL KEVIN D·Filed 2009·Granted Mar 27, 2012·6 cites·11 claims
- 3178US7017025B1Mechanism for proxy management of multiprocessor virtual memoryMIPS TECH INC·Filed 2002·Granted Mar 21, 2006·38 cites·25 claims
- 3276US7237097B2Partial bitwise permutationsMIPS TECH INC·Filed 2001·Granted Jun 26, 2007·24 cites·36 claims
- 3375US6826681B2Instruction specified register value saving in allocated caller stack or not yet allocated callee stackMIPS TECH INC·Filed 2001·Granted Nov 30, 2004·16 cites·30 claims
- 3474US7594089B2Smart memory based synchronization controller for a multi-threaded multiprocessor SoCMIPS TECH INC·Filed 2004·Granted Sep 22, 2009·20 cites·69 claims
- 3572US6728859B1Programmable page table accessMIPS TECH INC·Filed 2001·Granted Apr 27, 2004·17 cites·43 claims
- 3670US7711931B2Synchronized storage providing multiple synchronization semanticsMIPS TECH INC·Filed 2004·Granted May 4, 2010·14 cites·74 claims
- 3769US7739484B2Instruction encoding to indicate whether to store argument registers as static registers and return address in subroutine stackMIPS TECH INC·Filed 2007·Granted Jun 15, 2010·3 cites·9 claims
- 3867US7711763B2Microprocessor instructions for performing polynomial arithmetic operationsMIPS TECH INC·Filed 2001·Granted May 4, 2010·13 cites·55 claims
- 3966US9218183B2System and method for improving memory transferKISHORE KARAGADA R·Filed 2010·Granted Dec 22, 2015·2 cites·27 claims
- 4066US8447958B2Substituting portion of template instruction parameter with selected virtual instruction parameterKISSELL KEVIN D·Filed 2009·Granted May 21, 2013·2 cites·16 claims
- 4166US7281123B2Restoring register values from stack memory using instruction with restore indication bit and de-allocation frame size stack pointer offsetMIPS TECH INC·Filed 2004·Granted Oct 9, 2007·8 cites·22 claims
- 4265US7721075B2Conditional branch execution in a processor having a write-tie instruction and a data mover engine that associates register addresses with memory addressesMIPS TECH INC·Filed 2006·Granted May 18, 2010·3 cites·35 claims
- 4364US11422837B2Virtual machine coprocessor for accelerating software executionARM FINANCE OVERSEAS LTD·Filed 2018·Granted Aug 23, 2022·0 cites·18 claims
- 4462US9552293B1Emulating eviction data paths for invalidated instruction cacheSEREBRIN BENJAMIN CHARLES·Filed 2012·Granted Jan 24, 2017·3 cites·30 claims
- 4561US9207958B1Virtual machine coprocessor for accelerating software executionKISSELL KEVIN D·Filed 2003·Granted Dec 8, 2015·5 cites·23 claims
- 4661US2024378475A1Qubit surface allocation systemGOOGLE LLC·Filed 2023·Application pending·0 cites
- 4749US10416920B2System and method for improving memory transferARM FINANCE OVERSEAS LTD·Filed 2015·Granted Sep 17, 2019·0 cites·6 claims
- 4845US2005050305A1Integrated mechanism for suspension and deallocation of computational threads of execution in a processorFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →