Inventor · disambiguated record
Kevin Lin
Also filed as: LIN KEVIN · LIN KEVIN LAI · Lin kevin l
104 granted patents·13 pending applications·170 citations·filing 2012–2025
99Inventor score
Top patents by PatentIndex Score
117 records- 0198US11444024B2Subtractively patterned interconnect structures for integrated circuitsINTEL CORP·Filed 2020·Granted Sep 13, 2022·10 cites·30 claims
- 0296US10892223B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2016·Granted Jan 12, 2021·11 cites·25 claims
- 0396US8633551B1Semiconductor package with mechanical fuseTEH WENG HONG·Filed 2012·Granted Jan 21, 2014·30 cites·30 claims
- 0495US12218052B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2023·Granted Feb 4, 2025·1 cites·20 claims
- 0595US12027458B2Subtractively patterned interconnect structures for integrated circuitsINTEL CORP·Filed 2022·Granted Jul 2, 2024·2 cites·20 claims
- 0695US11764306B2Multi-layer crystalline back gated thin film transistorINTEL CORP·Filed 2021·Granted Sep 19, 2023·2 cites·20 claims
- 0794US9236342B2Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnectsBRISTOL ROBERT L·Filed 2013·Granted Jan 12, 2016·21 cites·20 claims
- 0893US11830788B2Integrated circuits and methods for forming integrated circuitsINTEL CORP·Filed 2021·Granted Nov 28, 2023·2 cites·6 claims
- 0992US10366903B2Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and viasINTEL CORP·Filed 2015·Granted Jul 30, 2019·6 cites·10 claims
- 1091US11854787B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2022·Granted Dec 26, 2023·1 cites·19 claims
- 1189US9489928B2Adjustment of monitor resolution and pixel refreshment based on detected viewer distanceINTEL CORP·Filed 2013·Granted Nov 8, 2016·8 cites·21 claims
- 1288US10366950B2Bottom-up selective dielectric cross-linking to prevent via landing shortsINTEL CORP·Filed 2015·Granted Jul 30, 2019·5 cites·15 claims
- 1388US2025125260A1Advanced lithography and self-assembled devicesINTEL CORP·Filed 2024·Application pending·0 cites
- 1485US11854882B2Subtractive plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnectsTAHOE RES LTD·Filed 2020·Granted Dec 26, 2023·1 cites·25 claims
- 1585US11373950B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2020·Granted Jun 28, 2022·1 cites·19 claims
- 1685US11328992B2Integrated circuit components with dummy structuresINTEL CORP·Filed 2017·Granted May 10, 2022·4 cites·17 claims
- 1785US11152514B2Multi-layer crystalline back gated thin film transistorINTEL CORP·Filed 2017·Granted Oct 19, 2021·3 cites·25 claims
- 1885US10615117B2Self-aligned viaINTEL CORP·Filed 2016·Granted Apr 7, 2020·4 cites·14 claims
- 1985US8975138B2Method of creating a maskless air gap in back end interconnects with double self-aligned viasCHANDHOK MANISH·Filed 2013·Granted Mar 10, 2015·9 cites·14 claims
- 2084US10553532B2Structure and method to self align via to top and bottom of tight pitch metal interconnect layersINTEL CORP·Filed 2014·Granted Feb 4, 2020·6 cites·25 claims
- 2184US2025029876A1Subtractive plug and tab patterning with photobuckets for back end of line (beol) spacer-based interconnectsTAHOE RES LTD·Filed 2024·Application pending·0 cites
- 2283US12482744B2Subtractively patterned interconnect structures for integrated circuitsINTEL CORP·Filed 2024·Granted Nov 25, 2025·0 cites·19 claims
- 2383US9297824B2Techniques, systems and devices related to acceleration measurementMA QING·Filed 2012·Granted Mar 29, 2016·4 cites·16 claims
- 2483US9200973B2Semiconductor package with air pressure sensorLin kevin l·Filed 2012·Granted Dec 1, 2015·6 cites·14 claims
- 2582US11011463B2Dielectric helmet-based approaches for back end of line (BEOL) interconnect fabrication and structures resulting therefromINTEL CORP·Filed 2016·Granted May 18, 2021·3 cites·20 claims
- 2681US9553018B2Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnectsINTEL CORP·Filed 2015·Granted Jan 24, 2017·3 cites·11 claims
- 2780US12506059B2Vertically spaced intra-level interconnect line metallization for integrated circuit devicesINTEL CORP·Filed 2024·Granted Dec 23, 2025·0 cites·20 claims
- 2880US12119409B2Multi-layer crystalline back gated thin film transistorINTEL CORP·Filed 2023·Granted Oct 15, 2024·0 cites·20 claims
- 2980US2024213095A1Subtractive plug and tab patterning with photobuckets for back end of line (beol) spacer-based interconnectsTAHOE RES LTD·Filed 2023·Application pending·0 cites
- 3080US2025372524A1Integrated circuit structure with filled recessesSK HYNIX NAND PRODUCT SOLUTIONS CORP DBA SOLIDIGM·Filed 2025·Application pending·0 cites
- 3179US11335777B2Integrated circuit components with substrate cavitiesINTEL CORP·Filed 2017·Granted May 17, 2022·2 cites·22 claims
- 3279US10109583B2Method for creating alternate hardmask cap interconnect structure with increased overlay marginINTEL CORP·Filed 2014·Granted Oct 23, 2018·4 cites·25 claims
- 3378US11137681B2Lined photobucket structure for back end of line (BEOL) interconnect formationINTEL CORP·Filed 2016·Granted Oct 5, 2021·2 cites·19 claims
- 3476US12261057B2Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and viasTAHOE RES LTD·Filed 2022·Granted Mar 25, 2025·0 cites·11 claims
- 3575US11705395B2Core fill to reduce dishing and metal pillar fill to increase metal density of interconnectsINTEL CORP·Filed 2018·Granted Jul 18, 2023·2 cites·15 claims
- 3675US9250261B2Method, apparatus and system for providing metering of accelerationLin kevin l·Filed 2012·Granted Feb 2, 2016·3 cites·25 claims
- 3775US2024304549A1Multi-height & multi-width interconnect line metallization for integrated circuit structuresINTEL CORP·Filed 2024·Application pending·0 cites
- 3874US11462469B2Single mask lithography line end enhancementINTEL CORP·Filed 2018·Granted Oct 4, 2022·2 cites·28 claims
- 3974US11276644B2Integrated circuits and methods for forming thin film crystal layersINTEL CORP·Filed 2018·Granted Mar 15, 2022·1 cites·9 claims
- 4074US9824642B2Rendering techniques for textured displaysINTEL CORP·Filed 2013·Granted Nov 21, 2017·2 cites·25 claims
- 4173US11205586B2Integrated circuits with line breaks and line bridges within a single interconnect levelINTEL CORP·Filed 2017·Granted Dec 21, 2021·1 cites·20 claims
- 4272US12211794B2Integrated circuits and methods for forming thin film crystal layersINTEL CORP·Filed 2022·Granted Jan 28, 2025·0 cites·9 claims
- 4371US11953826B2Lined photobucket structure for back end of line (BEOL) interconnect formationINTEL CORP·Filed 2021·Granted Apr 9, 2024·0 cites·20 claims
- 4471US11888034B2Transistors with metal chalcogenide channel materialsINTEL CORP·Filed 2019·Granted Jan 30, 2024·1 cites·19 claims
- 4571US10867853B2Subtractive plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnectsINTEL CORP·Filed 2016·Granted Dec 15, 2020·1 cites·23 claims
- 4670US11830768B2Integrated circuits with line breaks and line bridges within a single interconnect levelINTEL CORP·Filed 2021·Granted Nov 28, 2023·0 cites·20 claims
- 4770US11784121B2Integrated circuit components with dummy structuresINTEL CORP·Filed 2022·Granted Oct 10, 2023·0 cites·20 claims
- 4870US11605592B2Method to fabricate metal and ferromagnetic metal multilayer interconnect line for skin effect suppressionINTEL CORP·Filed 2018·Granted Mar 14, 2023·1 cites·19 claims
- 4970US10804141B2Damascene plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnectsINTEL CORP·Filed 2016·Granted Oct 13, 2020·1 cites·20 claims
- 5068US11894270B2Grating replication using helmets and topographically-selective depositionINTEL CORP·Filed 2022·Granted Feb 6, 2024·0 cites·8 claims
Showing the top 50 of 117 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →