Inventor · disambiguated record
Kern Rim
Also filed as: RIM KERN
160 granted patents·33 pending applications·2,071 citations·filing 2000–2025
99Inventor score
Top patents by PatentIndex Score
193 records- 0199US6815738B2Multiple gate MOSFET structure with strained Si Fin bodyIBM·Filed 2003·Granted Nov 9, 2004·141 cites·28 claims
- 0298US10332881B1Integrating a gate-all-around (GAA) field-effect transistor(s) (FET(S)) and a finFET(s) on a common substrate of a semiconductor dieQUALCOMM INC·Filed 2018·Granted Jun 25, 2019·59 cites·17 claims
- 0398US9349658B1Methods of forming fin isolation regions on finFET semiconductor devices using an oxidation-blocking layer of materialGLOBALFOUNDRIES INC·Filed 2015·Granted May 24, 2016·31 cites·16 claims
- 0498US8217423B2Structure and method for mobility enhanced MOSFETs with unalloyed silicideLIU YAOCHENG·Filed 2007·Granted Jul 10, 2012·97 cites·8 claims
- 0598US7524740B1Localized strain relaxation for strained Si directly on insulatorIBM·Filed 2008·Granted Apr 28, 2009·70 cites·2 claims
- 0698US6603156B2Strained silicon on insulator structuresIBM·Filed 2001·Granted Aug 5, 2003·178 cites·12 claims
- 0798US6429061B1Method to fabricate a strained Si CMOS structure using selective epitaxial deposition of Si after device isolation formationIBM·Filed 2000·Granted Aug 6, 2002·254 cites·12 claims
- 0897US7329923B2High-performance CMOS devices on hybrid crystal oriented substratesIBM·Filed 2003·Granted Feb 12, 2008·138 cites·5 claims
- 0996US9871121B2Semiconductor device having a gap defined thereinQUALCOMM INC·Filed 2014·Granted Jan 16, 2018·25 cites·16 claims
- 1095US9799560B2Self-aligned structureQUALCOMM INC·Filed 2015·Granted Oct 24, 2017·13 cites·40 claims
- 1195US9548386B1Structure and method for compressively strained silicon germanium fins for pFET devices and tensily strained silicon fins for nFET devicesIBM·Filed 2015·Granted Jan 17, 2017·11 cites·13 claims
- 1295US9178068B1FinFET with oxidation-induced stressIBM·Filed 2015·Granted Nov 3, 2015·11 cites·12 claims
- 1395US8987823B2Method and structure for forming a localized SOI finFETIBM·Filed 2013·Granted Mar 24, 2015·20 cites·9 claims
- 1495US8928086B2Strained finFET with an electrically isolated channelIBM·Filed 2013·Granted Jan 6, 2015·19 cites·15 claims
- 1595US7381623B1Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performanceIBM·Filed 2007·Granted Jun 3, 2008·31 cites·16 claims
- 1695US6667528B2Semiconductor-on-insulator lateral p-i-n photodetector with a reflecting mirror and backside contact and method for forming the sameIBM·Filed 2002·Granted Dec 23, 2003·91 cites·43 claims
- 1794US9577100B2FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regionsGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 21, 2017·17 cites·13 claims
- 1894US9257556B2Silicon germanium FinFET formation by Ge condensationQUALCOMM INC·Filed 2014·Granted Feb 9, 2016·19 cites·26 claims
- 1994US9190520B2Strained finFET with an electrically isolated channelIBM·Filed 2014·Granted Nov 17, 2015·15 cites·18 claims
- 2094US7202513B1Stress engineering using dual pad nitride with selective SOI device architectureIBM·Filed 2005·Granted Apr 10, 2007·30 cites·10 claims
- 2193US9431306B2Methods of forming fin isolation regions on FinFET semiconductor devices using an oxidation-blocking layer of material and by performing a fin-trimming processGLOBALFOUNDRIES INC·Filed 2016·Granted Aug 30, 2016·7 cites·16 claims
- 2293US9117875B2Methods of forming isolated germanium-containing fins for a FinFET semiconductor deviceGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 25, 2015·14 cites·20 claims
- 2393US8642434B2Structure and method for mobility enhanced MOSFETS with unalloyed silicideLIU YAOCHENG·Filed 2012·Granted Feb 4, 2014·14 cites·14 claims
- 2493US7297618B1Fully silicided gate electrodes and method of making the sameIBM·Filed 2006·Granted Nov 20, 2007·18 cites·27 claims
- 2593US7227205B2Strained-silicon CMOS device and methodIBM·Filed 2004·Granted Jun 5, 2007·72 cites·5 claims
- 2693US7132322B1Method for forming a SiGe or SiGeC gate selectively in a complementary MIS/MOS FET deviceIBM·Filed 2005·Granted Nov 7, 2006·27 cites·20 claims
- 2792US10439039B2Integrated circuits including a FinFET and a nanostructure FETQUALCOMM INC·Filed 2016·Granted Oct 8, 2019·8 cites·30 claims
- 2892US9583492B2Structure and method for advanced bulk fin isolationIBM·Filed 2016·Granted Feb 28, 2017·6 cites·18 claims
- 2992US8766363B2Method and structure for forming a localized SOI finFETIBM·Filed 2012·Granted Jul 1, 2014·14 cites·11 claims
- 3092US7939413B2Embedded stressor structure and processSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted May 10, 2011·27 cites·27 claims
- 3191US9853112B2Device and method to connect gate regions separated using a gate cutQUALCOMM INC·Filed 2015·Granted Dec 26, 2017·7 cites·15 claims
- 3291US9633996B1High density area efficient thin-oxide decoupling capacitor using conductive gate resistorQUALCOMM INC·Filed 2016·Granted Apr 25, 2017·8 cites·25 claims
- 3391US9379058B2Grounding dummy gate in scaled layout designQUALCOMM INC·Filed 2014·Granted Jun 28, 2016·13 cites·15 claims
- 3491US9293583B2Finfet with oxidation-induced stressIBM·Filed 2015·Granted Mar 22, 2016·6 cites·4 claims
- 3591US8969155B2Fin structure with varying isolation thicknessIBM·Filed 2013·Granted Mar 3, 2015·11 cites·18 claims
- 3691US7002209B2MOSFET structure with high mechanical stress in the channelIBM·Filed 2004·Granted Feb 21, 2006·61 cites·20 claims
- 3791US6451702B1Methods for forming lateral trench optical detectorsIBM·Filed 2001·Granted Sep 17, 2002·68 cites·21 claims
- 3890US9299618B1Structure and method for advanced bulk fin isolationIBM·Filed 2014·Granted Mar 29, 2016·7 cites·15 claims
- 3990US7791144B2High performance stress-enhance MOSFET and method of manufactureIBM·Filed 2009·Granted Sep 7, 2010·28 cites·18 claims
- 4089US7560326B2Silicon/silcion germaninum/silicon body device with embedded carbon dopantIBM·Filed 2006·Granted Jul 14, 2009·18 cites·2 claims
- 4188US11257917B2Gate-all-around (GAA) transistors with additional bottom channel for reduced parasitic capacitance and methods of fabricationQUALCOMM INC·Filed 2020·Granted Feb 22, 2022·2 cites·24 claims
- 4288US10134734B2Fin field effect transistor (FET) (FinFET) complementary metal oxide semiconductor (CMOS) circuits employing single and double diffusion breaks for increased performanceQUALCOMM INC·Filed 2016·Granted Nov 20, 2018·5 cites·13 claims
- 4388US9653541B2Structure and method to make strained FinFET with improved junction capacitance and low leakageIBM·Filed 2015·Granted May 16, 2017·4 cites·19 claims
- 4488US8659054B2Method and structure for pFET junction profile with SiGe channelRIM KERN·Filed 2010·Granted Feb 25, 2014·14 cites·19 claims
- 4588US7714358B2Semiconductor structure and method of forming the structureIBM·Filed 2007·Granted May 11, 2010·12 cites·19 claims
- 4687US9190329B1Complex circuits utilizing fin structuresIBM·Filed 2014·Granted Nov 17, 2015·6 cites·12 claims
- 4787US8626480B2Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factorsCHANG PAUL·Filed 2009·Granted Jan 7, 2014·20 cites·23 claims
- 4886US7888264B2MOSFET structure with multiple self-aligned silicide contactsIBM·Filed 2010·Granted Feb 15, 2011·6 cites·22 claims
- 4986US7808081B2Strained-silicon CMOS device and methodIBM·Filed 2007·Granted Oct 5, 2010·11 cites·1 claims
- 5086US7221024B1Transistor having dielectric stressor elements for applying in-plane shear stressIBM·Filed 2005·Granted May 22, 2007·11 cites·20 claims
Showing the top 50 of 193 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →