Inventor · disambiguated record
Kevin Weaver
Also filed as: WEAVER KEVIN · WEAVER KEVIN C
20 granted patents·206 citations·filing 1996–2006
95Inventor score
Top patents by PatentIndex Score
20 records- 0179US7279343B1De-packaging process for small outline transistor packagesNAT SEMICONDUCTOR CORP·Filed 2005·Granted Oct 9, 2007·10 cites·15 claims
- 0271US7087927B1Semiconductor die with an editing structureNAT SEMICONDUCTOR CORP·Filed 2003·Granted Aug 8, 2006·21 cites·17 claims
- 0371US6068727AApparatus and method for separating a stiffener member from a flip chip integrated circuit package substrateLSI LOGIC CORP·Filed 1998·Granted May 30, 2000·36 cites·13 claims
- 0468US6100590ALow capacitance multilevel metal interconnect structure and method of manufactureNAT SEMICONDUCTOR CORP·Filed 1998·Granted Aug 8, 2000·36 cites·13 claims
- 0563US6842021B1System and method for detecting location of a defective electrical connection within an integrated circuitNAT SEMICONDUCTOR CORP·Filed 2003·Granted Jan 11, 2005·12 cites·14 claims
- 0661US7848562B1Method of reducing the time required to perform a passive voltage contrast testNAT SEMICONDUCTOR CORP·Filed 2005·Granted Dec 7, 2010·4 cites·17 claims
- 0761US6411111B1Electron-electro-optical debug system E2ODSNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jun 25, 2002·8 cites·11 claims
- 0861US6117352ARemoval of a heat spreader from an integrated circuit package to permit testing of the integrated circuit and other elements of the packageLSI LOGIC CORP·Filed 1997·Granted Sep 12, 2000·28 cites·17 claims
- 0956US6937351B1Non-destructive method of measuring the thickness of a semiconductor waferNAT SEMICONDUCTOR CORP·Filed 2002·Granted Aug 30, 2005·8 cites·20 claims
- 1055US6518074B1Backside IC device preparation processNAT SEMICONDUCTOR CORP·Filed 2000·Granted Feb 11, 2003·7 cites·11 claims
- 1153US7250310B1Process for forming and analyzing stacked dieNAT SEMICONDUCTOR CORP·Filed 2004·Granted Jul 31, 2007·6 cites·19 claims
- 1251US7172977B1Method for non-destructive removal of cured epoxy from wafer backsideNAT SEMICONDUCTOR CORP·Filed 2004·Granted Feb 6, 2007·4 cites·14 claims
- 1344US6801046B1Method of testing the electrostatic discharge performance of an IC deviceNAT SEMICONDUCTOR CORP·Filed 2000·Granted Oct 5, 2004·4 cites·20 claims
- 1443US7352001B1Method of editing a semiconductor dieNAT SEMICONDUCTOR CORP·Filed 2006·Granted Apr 1, 2008·0 cites·19 claims
- 1543US6424167B1Vibration resistant test module for use with semiconductor device test apparatusNAT SEMICONDUCTOR CORP·Filed 2000·Granted Jul 23, 2002·3 cites·9 claims
- 1641US6952106B1E-beam voltage potential circuit performance libraryNAT SEMICONDUCTOR CORP·Filed 2003·Granted Oct 4, 2005·2 cites·1 claims
- 1740US7470553B1Built-in design edit structuresNAT SEMICONDUCTOR CORP·Filed 2005·Granted Dec 30, 2008·0 cites·11 claims
- 1837US6083848ARemoving solder from integrated circuits for failure analysisLSI LOGIC CORP·Filed 1998·Granted Jul 4, 2000·7 cites·13 claims
- 1932US6043100AChip on tape die reframe processFiled 1996·Granted Mar 28, 2000·6 cites·46 claims
- 2031US5990543AReframed chip-on-tape dieLSI LOGIC CORP·Filed 1997·Granted Nov 23, 1999·4 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →