Inventor · disambiguated record
Khaled Fekih-Romdhane
Also filed as: FEKIH-ROMDHANE KHALED
8 granted patents·7 pending applications·58 citations·filing 2004–2008
86Inventor score
Technology areasG11C
Files withFEKIH-ROMDHANE KHALED7INFINEON TECHNOLOGIES AG4QIMONDA NORTH AMERICA CORP2LIU SKIP S1QIMONDA AG1
Top patents by PatentIndex Score
15 records- 0180US7362633B2Parallel read for front end compression modeINFINEON TECHNOLOGIES AG·Filed 2006·Granted Apr 22, 2008·12 cites·13 claims
- 0272US7940582B2Integrated circuit that stores defective memory cell addressesQIMONDA AG·Filed 2008·Granted May 10, 2011·9 cites·20 claims
- 0369US7773438B2Integrated circuit that stores first and second defective memory cell addressesQIMONDA NORTH AMERICA CORP·Filed 2008·Granted Aug 10, 2010·7 cites·25 claims
- 0458US7123542B2Memory having internal column counter for compression test modeINFINEON TECHNOLOGIES AG·Filed 2004·Granted Oct 17, 2006·10 cites·32 claims
- 0555US7872931B2Integrated circuit with control circuit for performing retention testQIMONDA NORTH AMERICA CORP·Filed 2008·Granted Jan 18, 2011·3 cites·17 claims
- 0655US7164613B2Flexible internal address counting method and apparatusINFINEON TECHNOLOGIES AG·Filed 2004·Granted Jan 16, 2007·8 cites·21 claims
- 0754US8122320B2Integrated circuit including an ECC error counterFEKIH-ROMDHANE KHALED·Filed 2008·Granted Feb 21, 2012·5 cites·20 claims
- 0852US7230858B2Dual frequency first-in-first-out structureINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jun 12, 2007·4 cites·24 claims
- 0933US2008159031A1Parallel read for front end compression modeFEKIH-ROMDHANE KHALED·Filed 2008·Application pending·0 cites
- 1028US2007226553A1Multiple banks read and data compression for back end testFEKIH-ROMDHANE KHALED·Filed 2006·Application pending·0 cites
- 1127US2007245036A1Illegal commands handling at the command decoder stageFEKIH-ROMDHANE KHALED·Filed 2006·Application pending·0 cites
- 1226US2006294443A1On-chip address generationFEKIH-ROMDHANE KHALED·Filed 2005·Application pending·0 cites
- 1324US2006171234A1DDR II DRAM data pathLIU SKIP S·Filed 2005·Application pending·0 cites
- 1422US2006171233A1Near pad ordering logicFEKIH-ROMDHANE KHALED·Filed 2005·Application pending·0 cites
- 1522US2006161743A1Intelligent memory array switching logicFEKIH-ROMDHANE KHALED·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →