Inventor · disambiguated record
Kimming So
Also filed as: SO KIMMING · SO KIMMING K
26 granted patents·9 pending applications·840 citations·filing 1984–2009
97Inventor score
Top patents by PatentIndex Score
35 records- 0194US6944746B2RISC processor supporting one or more uninterruptible co-processorsBROADCOM CORP·Filed 2002·Granted Sep 13, 2005·68 cites·12 claims
- 0292US6963613B2Method of communicating between modules in a decoding systemBROADCOM CORP·Filed 2002·Granted Nov 8, 2005·48 cites·26 claims
- 0390US6957306B2System and method for controlling prefetchingBROADCOM CORP·Filed 2002·Granted Oct 18, 2005·45 cites·27 claims
- 0482US5584013AHierarchical cache arrangement wherein the replacement of an LRU entry in a second level cache is prevented when the cache entry is the only inclusive entry in the first level cacheIBM·Filed 1994·Granted Dec 10, 1996·88 cites·17 claims
- 0582US4774654AApparatus and method for prefetching subblocks from a low speed memory to a high speed memory of a memory hierarchy depending upon state of replacing bit in the low speed memoryIBM·Filed 1984·Granted Sep 27, 1988·59 cites·10 claims
- 0679US5530832ASystem and method for practicing essential inclusion in a multiprocessor and cache hierarchyIBM·Filed 1993·Granted Jun 25, 1996·80 cites·7 claims
- 0778US5581734AMultiprocessor system with shared cache and data input/output circuitry for transferring data amount greater than system bus capacityIBM·Filed 1993·Granted Dec 3, 1996·82 cites·13 claims
- 0877US5048018ADebugging parallel programs by serializationIBM·Filed 1989·Granted Sep 10, 1991·53 cites·12 claims
- 0971US7386646B2System and method for interrupt distribution in a multithread processorBROADCOM CORP·Filed 2005·Granted Jun 10, 2008·7 cites·18 claims
- 1071US5133061AMechanism for improving the randomization of cache accesses utilizing abit-matrix multiplication permutation of cache addressesIBM·Filed 1990·Granted Jul 21, 1992·62 cites·7 claims
- 1167US5553253ACorrelation-based branch prediction in digital computersIBM·Filed 1994·Granted Sep 3, 1996·46 cites·8 claims
- 1266US6073211AMethod and system for memory updates within a multiprocessor data processing systemIBM·Filed 1997·Granted Jun 6, 2000·51 cites·20 claims
- 1364US7617380B2System and method for synchronizing translation lookaside buffer access in a multithread processorBROADCOM CORP·Filed 2005·Granted Nov 10, 2009·5 cites·14 claims
- 1459US6931494B2System and method for directional prefetchingBROADCOM CORP·Filed 2002·Granted Aug 16, 2005·4 cites·28 claims
- 1559US5694573AShared L2 support for inclusion property in split L1 data and instruction cachesIBM·Filed 1996·Granted Dec 2, 1997·37 cites·2 claims
- 1657US8726292B2System and method for communication in a multithread processorSO KIMMING·Filed 2005·Granted May 13, 2014·3 cites·19 claims
- 1756US8356158B2Mini-translation lookaside buffer for use in memory translationBROADCOM CORP·Filed 2003·Granted Jan 15, 2013·6 cites·33 claims
- 1854US7167954B2System and method for cachingBROADCOM CORP·Filed 2002·Granted Jan 23, 2007·2 cites·40 claims
- 1952US5533189ASystem and method for error correction code generationIBM·Filed 1994·Granted Jul 2, 1996·24 cites·7 claims
- 2051US5655103ASystem and method for handling stale data in a multiprocessor systemIBM·Filed 1995·Granted Aug 5, 1997·27 cites·12 claims
- 2151US2006056517A1Method of communicating between modules in a decoding systemMACINNIS ALEXANDER G·Filed 2005·Application pending·0 cites
- 2250US2011055482A1Shared cache reservationBROADCOM CORP·Filed 2009·Application pending·0 cites
- 2349US7711906B2System and method for cachingBROADCOM CORP·Filed 2005·Granted May 4, 2010·0 cites·24 claims
- 2449US7627720B2System and method for directional prefetchingBROADCOM CORP·Filed 2005·Granted Dec 1, 2009·0 cites·14 claims
- 2547US5897651AInformation handling system including a direct access set associative cache and method for accessing sameIBM·Filed 1995·Granted Apr 27, 1999·21 cites·2 claims
- 2645US2004143711A1Mechanism to maintain data coherency for a read-ahead cacheFiled 2003·Application pending·0 cites
- 2743US2005210201A1System and method for controlling prefetchingSO KIMMING·Filed 2005·Application pending·0 cites
- 2842US5692151AHigh performance/low cost access hazard detection in pipelined cache controller using comparators with a width shorter than and independent of total width of memory addressIBM·Filed 1994·Granted Nov 25, 1997·13 cites·2 claims
- 2939US2005015578A1Two-bit branch prediction scheme using reduced memory sizeFiled 2003·Application pending·0 cites
- 3037US7111127B2System for supporting unlimited consecutive data stores into a cache memoryBROADCOM CORP·Filed 2003·Granted Sep 19, 2006·0 cites·19 claims
- 3134US2006224653A1Method and system for dynamic session control of digital signal processing operationsSO KIMMING·Filed 2005·Application pending·0 cites
- 3234US2006224832A1System and method for performing a prefetch operationSO KIMMING·Filed 2005·Application pending·0 cites
- 3333US5699538AEfficient firm consistency support mechanisms in an out-of-order execution superscaler multiprocessorIBM·Filed 1994·Granted Dec 16, 1997·9 cites·10 claims
- 3433US2006224654A1Method and system for performing digital signal processing operations in a computer systemSO KIMMING·Filed 2005·Application pending·0 cites
- 3530US2007094664A1Programmable priority for concurrent multi-threaded processorsSO KIMMING·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →