Inventor · disambiguated record
Kuo-Ning Chiang
Also filed as: CHIANG KUO-NING
6 granted patents·4 pending applications·78 citations·filing 1999–2006
83Inventor score
Top patents by PatentIndex Score
10 records- 0179US7211886B2Three-dimensional multichip stack electronic package structureIND TECH RES INST·Filed 2006·Granted May 1, 2007·12 cites·2 claims
- 0259US6034425AFlat multiple-chip module micro ball grid array packagingCHIPMOS TECHNOLOGIES INC·Filed 1999·Granted Mar 7, 2000·26 cites·10 claims
- 0357US6023097AStacked multiple-chip module micro ball grid array packagingCHIPMOS TECHNOLOGIES INC·Filed 1999·Granted Feb 8, 2000·24 cites·8 claims
- 0453US6541834B1Silicon pressure micro-sensing device and the fabrication processINTEGRATED CRYSTAL TECHNOLOGY·Filed 2001·Granted Apr 1, 2003·6 cites·2 claims
- 0548US6781225B2Glueless integrated circuit system in a packaging moduleCHIPMOS TECHNOLOGIES INC·Filed 2002·Granted Aug 24, 2004·4 cites·3 claims
- 0635US2005224947A1Three-dimensional multichip stack electronic package structureIND TECH RES INST·Filed 2004·Application pending·0 cites
- 0734US6137174AHybrid ASIC/memory module packageCHIPMOS TECHNOLOGIES INC·Filed 1999·Granted Oct 24, 2000·6 cites·8 claims
- 0833US2006055032A1Packaging with metal studs formed on solder padsCHANG KUO-CHIN·Filed 2004·Application pending·0 cites
- 0932US2002050378A1Double-layered multiple chip module packageFiled 2001·Application pending·0 cites
- 1031US2002125551A1Micro bubble grid array semiconductor packageFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →