Inventor · disambiguated record
Kuan-Hsiang Mao
Also filed as: MAO KUAN-HSIANG
8 granted patents·10 pending applications·4 citations·filing 2021–2024
75Inventor score
Top patents by PatentIndex Score
18 records- 0188US12288770B2Semiconductor packages with embedded wiring on re-distributed bumpsNXP BV·Filed 2022·Granted Apr 29, 2025·2 cites·10 claims
- 0288US11640947B2Pre-resist island forming via method and apparatusNXP BV·Filed 2021·Granted May 2, 2023·2 cites·18 claims
- 0372US2024387271A1Packaged semiconductor devices and methods thereforNXP BV·Filed 2024·Application pending·0 cites
- 0470US2024194486A1Backside and sidewall metallization of semiconductor devicesNXP BV·Filed 2024·Application pending·0 cites
- 0567US11935753B2Backside and sidewall metallization of semiconductor devicesNXP BV·Filed 2021·Granted Mar 19, 2024·0 cites·11 claims
- 0664US12494448B2UBM-free metal skeleton frame with support studs and method for fabrication thereofNXP BV·Filed 2022·Granted Dec 9, 2025·0 cites·20 claims
- 0762US12080601B2Packaged semiconductor devices and methods thereforNXP BV·Filed 2021·Granted Sep 3, 2024·0 cites·11 claims
- 0859US12387985B2Semiconductor device with cavity carrier and method thereforNXP BV·Filed 2022·Granted Aug 12, 2025·0 cites·20 claims
- 0955US12406951B2Redistribution layer having a sideview zig-zag profileNXP BV·Filed 2022·Granted Sep 2, 2025·0 cites·20 claims
- 1054US12198998B2Dielectric sidewall protection and sealing for semiconductor devices in a in wafer level packaging processNXP BV·Filed 2021·Granted Jan 14, 2025·0 cites·19 claims
- 1152US2025069903A1Semiconductor device with embedded leadframe and method thereforNXP BV·Filed 2023·Application pending·0 cites
- 1252US2025132235A1Semiconductor device with surrounding bump metallization and method thereforNXP USA INC·Filed 2023·Application pending·0 cites
- 1350US2023369168A1Package having metal skeleton frame using embedded ground planeNXP BV·Filed 2022·Application pending·0 cites
- 1450US2024105659A1Semiconductor device with redistribution metallization and method thereforNXP BV·Filed 2022·Application pending·0 cites
- 1549US2024339426A1Leadless semiconductor package with dual-sided stud structure for die-to-package fan outNXP BV·Filed 2023·Application pending·0 cites
- 1649US2025174507A1Semiconductor device having embedded die and method thereforNXP BV·Filed 2023·Application pending·0 cites
- 1745US2023326821A1Five-side mold protection for semiconductor packagesNXP BV·Filed 2022·Application pending·0 cites
- 1844US2024014123A1Semiconductor device with lead-on-chip interconnect and method thereforNXP BV·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →