Inventor · disambiguated record
Kunaljeet Tanwar
Also filed as: TANWAR KUNALJEET
14 granted patents·3 pending applications·100 citations·filing 2012–2015
91Inventor score
Top patents by PatentIndex Score
17 records- 0195US8586473B1Methods for fabricating integrated circuits with ruthenium-lined copperTANWAR KUNALJEET·Filed 2012·Granted Nov 19, 2013·45 cites·20 claims
- 0290US9318437B1Moisture scavenging layer for thinner barrier application in beol integrationGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 19, 2016·9 cites·20 claims
- 0389US8835306B2Methods for fabricating integrated circuits having embedded electrical interconnectsGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 16, 2014·11 cites·20 claims
- 0487US9275874B2Methods for fabricating integrated circuits using chemical mechanical planarization to recess metalGLOBALFOUNDRIES INC·Filed 2013·Granted Mar 1, 2016·7 cites·19 claims
- 0586US9299745B2Integrated circuits having magnetic tunnel junctions (MTJ) and methods for fabricating the sameGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 29, 2016·5 cites·18 claims
- 0682US8932934B2Methods of self-forming barrier integration with pore stuffed ULK materialGLOBALFOUNDRIES INC·Filed 2013·Granted Jan 13, 2015·6 cites·13 claims
- 0777US9087881B2Electroless fill of trench in semiconductor structureGLOBALFOUNDRIES INC·Filed 2013·Granted Jul 21, 2015·4 cites·12 claims
- 0876US9054052B2Methods for integration of pore stuffing materialGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 9, 2015·3 cites·17 claims
- 0976US8669176B1BEOL integration scheme for copper CMP to prevent dendrite formationTANWAR KUNALJEET·Filed 2012·Granted Mar 11, 2014·5 cites·23 claims
- 1071US9076846B2Methods for fabricating integrated circuits using surface modification to selectively inhibit etchingGLOBALFOUNDRIES INC·Filed 2013·Granted Jul 7, 2015·2 cites·20 claims
- 1170US8962478B1Method to use self-repair Cu barrier to solve barrier degradation due to Ru CMPGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 24, 2015·2 cites·16 claims
- 1265US9343406B2Device having self-repair Cu barrier for solving barrier degradation due to Ru CMPGLOBALFOUNDRIES INC·Filed 2014·Granted May 17, 2016·1 cites·20 claims
- 1346US8883631B1Methods of forming conductive structures using a sacrificial material during a metal hard mask removal processGLOBALFOUNDRIES INC·Filed 2013·Granted Nov 11, 2014·0 cites·28 claims
- 1444US9558997B2Integration of Ru wet etch and CMP for beol interconnects with Ru layerGLOBALFOUNDRIES INC·Filed 2012·Granted Jan 31, 2017·0 cites·20 claims
- 1542US2014353805A1Methods of semiconductor contaminant removal using supercritical fluidGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 1642US2014357078A1Methods of forming conductive structures using a sacrificial material during an etching process that is performed to remove a metal hard maskGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 1739US2014057435A1Methods of forming a metal cap layer on copper-based conductive structures on an integrated circuit deviceZHANG XUNYUAN·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →