Inventor · disambiguated record
Leonel Arana
Also filed as: ARANA LEONEL · ARANA LEONEL R
46 granted patents·40 pending applications·653 citations·filing 2001–2024
97Inventor score
Top patents by PatentIndex Score
86 records- 0198US7402515B2Method of forming through-silicon vias with stress buffer collars and resulting devicesINTEL CORP·Filed 2005·Granted Jul 22, 2008·375 cites·22 claims
- 0296US7592697B2Microelectronic package and method of cooling sameINTEL CORP·Filed 2007·Granted Sep 22, 2009·64 cites·7 claims
- 0394US6939632B2Thermally efficient micromachined deviceMASSACHUSETTS INST TECHNOLOGY·Filed 2001·Granted Sep 6, 2005·55 cites·63 claims
- 0491US8513792B2Package-on-package interconnect stiffenerGANESAN SANKA·Filed 2009·Granted Aug 20, 2013·20 cites·18 claims
- 0591US7666768B2Through-die metal vias with a dispersed phase of graphitic structures of carbon for reduced thermal expansion and increased electrical conductanceINTEL CORP·Filed 2006·Granted Feb 23, 2010·23 cites·8 claims
- 0689US7528006B2Integrated circuit die containing particle-filled through-silicon metal vias with reduced thermal expansionINTEL CORP·Filed 2005·Granted May 5, 2009·17 cites·12 claims
- 0788US7462551B2Adhesive system for supporting thin silicon waferINTEL CORP·Filed 2005·Granted Dec 9, 2008·17 cites·5 claims
- 0886US7267779B2Thermally efficient micromachined deviceMASSACHUSETTS INST TECHNOLOGY·Filed 2005·Granted Sep 11, 2007·7 cites·20 claims
- 0986US7243833B2Electrically-isolated interconnects and seal rings in packages using a solder preformINTEL CORP·Filed 2005·Granted Jul 17, 2007·9 cites·19 claims
- 1086US7144299B2Methods and devices for supporting substrates using fluidsINTEL CORP·Filed 2005·Granted Dec 5, 2006·13 cites·13 claims
- 1184US11088103B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2018·Granted Aug 10, 2021·3 cites·20 claims
- 1280US7892883B2Clipless integrated heat spreader process and materialsINTEL CORP·Filed 2008·Granted Feb 22, 2011·9 cites·15 claims
- 1379US8383459B2Methods of processing a thermal interface materialINTEL CORP·Filed 2008·Granted Feb 26, 2013·10 cites·4 claims
- 1476US12354992B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2022·Granted Jul 8, 2025·0 cites·16 claims
- 1576US8009442B2Directing the flow of underfill materials using magnetic particlesINTEL CORP·Filed 2007·Granted Aug 30, 2011·6 cites·15 claims
- 1673US8287996B2Coating for a microelectronic device, treatment comprising same, and method of managing a thermal profile of a microelectronic dieXU DINGYING·Filed 2009·Granted Oct 16, 2012·5 cites·11 claims
- 1772US9659899B2Die warpage control for thin die assemblyINTEL CORP·Filed 2015·Granted May 23, 2017·2 cites·20 claims
- 1871US7971347B2Method of interconnecting workpiecesINTEL CORP·Filed 2008·Granted Jul 5, 2011·7 cites·6 claims
- 1970US12456705B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2021·Granted Oct 28, 2025·0 cites·18 claims
- 2069US11721631B2Via structures having tapered profiles for embedded interconnect bridge substratesINTEL CORP·Filed 2022·Granted Aug 8, 2023·0 cites·25 claims
- 2169US9472519B2Forming sacrificial composite materials for package-on-package architectures and structures formed therebyINTEL CORP·Filed 2015·Granted Oct 18, 2016·1 cites·21 claims
- 2267US9006887B2Forming sacrificial composite materials for package-on-package architectures and structures formed therebySWAMINATHAN RAJASEKARAN·Filed 2009·Granted Apr 14, 2015·2 cites·5 claims
- 2366US7224050B2Plastic materials including dendrimers or hyperbranched polymers for integrated circuit packagingINTEL CORP·Filed 2005·Granted May 29, 2007·3 cites·11 claims
- 2462US12345932B2Die last and waveguide last architecture for silicon photonic packagingINTEL CORP·Filed 2021·Granted Jul 1, 2025·0 cites·19 claims
- 2562US9808875B2Methods of fabricating low melting point solder reinforced sealant and structures formed therebyINTEL CORP·Filed 2016·Granted Nov 7, 2017·0 cites·8 claims
- 2661US2024347402A1Methods and apparatus to reduce delamination in hybrid coresINTEL CORP·Filed 2024·Application pending·0 cites
- 2758US12341117B2Methods and apparatus to reduce defects in interconnects between semiconductor dies and package substratesINTEL CORP·Filed 2021·Granted Jun 24, 2025·0 cites·25 claims
- 2858US2025218999A1Passive component assembly for thickness modification to match core thicknessINTEL CORP·Filed 2023·Application pending·0 cites
- 2958US2025279384A1Methods and apparatus using polymer material to fill gaps between semiconductor diesINTEL CORP·Filed 2024·Application pending·0 cites
- 3057US12449600B2Position controlled waveguides and methods of manufacturing the sameINTEL CORP·Filed 2021·Granted Oct 21, 2025·0 cites·25 claims
- 3157US9793233B2Forming sacrificial composite materials for package-on-package architectures and structures formed therebyINTEL CORP·Filed 2016·Granted Oct 17, 2017·0 cites·19 claims
- 3257US2025112124A1Deep cavity arrangements on integrated circuit packagingINTEL CORP·Filed 2023·Application pending·0 cites
- 3357US2008171249A1Thermally efficient micromachined deviceMASSACHUSETTS INST TECHNOLOGY·Filed 2007·Application pending·0 cites
- 3457US2025218958A1Pedestals for semiconductor components embedded in package substrates and related methodsINTEL CORP·Filed 2023·Application pending·0 cites
- 3555US10515824B2Enhanced etch anisotropy using nanoparticles as banking agents in the presence or absence of a magnetic or electrical fieldINTEL CORP·Filed 2018·Granted Dec 24, 2019·0 cites·24 claims
- 3655US9254532B2Methods of fabricating low melting point solder reinforced sealant and structures formed therebyKULKARNI DEEPAK V·Filed 2009·Granted Feb 9, 2016·0 cites·12 claims
- 3755US8674519B2Microelectronic package and method of manufacturing sameARANA LEONEL R·Filed 2010·Granted Mar 18, 2014·1 cites·15 claims
- 3855US2025113434A1Through glass via (tgv) with modulated profile for core stress reductionINTEL CORP·Filed 2023·Application pending·0 cites
- 3954US11817349B2Conductive route patterning for electronic substratesINTEL CORP·Filed 2020·Granted Nov 14, 2023·0 cites·20 claims
- 4054US9123732B2Die warpage control for thin die assemblySANE SANDEEP B·Filed 2012·Granted Sep 1, 2015·1 cites·16 claims
- 4153US12334422B2Methods and apparatus to reduce defects in interconnects between semicondcutor dies and package substratesINTEL CORP·Filed 2021·Granted Jun 17, 2025·0 cites·24 claims
- 4253US11373951B2Via structures having tapered profiles for embedded interconnect bridge substratesINTEL CORP·Filed 2018·Granted Jun 28, 2022·0 cites·17 claims
- 4353US2024203806A1Glass layer with litho defined through-glass viaINTEL CORP·Filed 2022·Application pending·0 cites
- 4452US10078204B2Non-destructive 3-dimensional chemical imaging of photo-resist materialINTEL CORP·Filed 2014·Granted Sep 18, 2018·0 cites·36 claims
- 4552US2024222259A1Methods, systems, apparatus, and articles of manufacture to produce integrated circuit packages having silicon nitride adhesion promotersINTEL CORP·Filed 2022·Application pending·0 cites
- 4652US2024006327A1Integrated circuit package with multi-layered metallization linesINTEL CORP·Filed 2022·Application pending·0 cites
- 4751US8569108B2Coating for a microelectronic device, treatment comprising same, and method of managing a thermal profile of a microelectronic dieXU DINGYING·Filed 2012·Granted Oct 29, 2013·0 cites·7 claims
- 4851US2024203853A1Dry film photoresist wet lamination and methodINTEL CORP·Filed 2022·Application pending·0 cites
- 4951US2024282591A1Tools and methods for surface levelingINTEL CORP·Filed 2023·Application pending·0 cites
- 5051US2024222283A1Methods and apparatus to prevent over-etch in semiconductor packagesINTEL CORP·Filed 2022·Application pending·0 cites
Showing the top 50 of 86 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →